verilator/test_regress
Christian Hecken 0df0064d64
Fix VPI access to Verilog `force`-ed signals (#7381)
2026-04-06 10:51:01 -04:00
..
t Fix VPI access to Verilog `force`-ed signals (#7381) 2026-04-06 10:51:01 -04:00
.gdbinit
.gitignore
CMakeLists.txt Add SPDX copyright identifiers, and get 'reuse' clean. No functional change. 2026-01-26 20:24:34 -05:00
Makefile Internals: make test-diff macOS compatibility fix - again 2026-01-28 11:05:27 +00:00
Makefile_obj Add SPDX copyright identifiers, and get 'reuse' clean. No functional change. 2026-01-26 20:24:34 -05:00
driver.py Tests: Set MallocNanoZone=0 on macOS when using asan 2026-03-22 17:09:02 +00:00
input.vc
input.xsim.vc