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luke
/
verilator
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0984fd045f10a79c2a82e80a237be44bcea2a47f
verilator
/
examples
/
make_tracing_c
T
History
Wilson Snyder
0984fd045f
Change
--trace
to
--trace-vcd
.
2025-04-05 10:46:39 -04:00
..
.gitignore
Rename examples in prep for CMake.
2019-10-06 10:32:49 -04:00
input.vc
Rename examples in prep for CMake.
2019-10-06 10:32:49 -04:00
Makefile
Change
--trace
to
--trace-vcd
.
2025-04-05 10:46:39 -04:00
Makefile_obj
Internals: Avoid using <tab> in the middle of lines (
#3913
)
2023-01-29 22:39:22 -05:00
sim_main.cpp
Rename statsPrintSummary()
2024-03-30 13:19:47 -04:00
sub.v
Examples: Cleanup some spacing
2024-09-25 14:24:01 -04:00
top.v
Tests: Standardize verilog indentation.
2020-04-05 21:53:24 -04:00
