913 lines
44 KiB
C++
913 lines
44 KiB
C++
// -*- mode: C++; c-file-style: "cc-mode" -*-
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//*************************************************************************
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// DESCRIPTION: Verilator: Collect and print statistics
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//
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// Code available from: https://verilator.org
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//
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//*************************************************************************
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//
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// This program is free software; you can redistribute it and/or modify it
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// under the terms of either the GNU Lesser General Public License Version 3
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// or the Perl Artistic License Version 2.0.
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// SPDX-FileCopyrightText: 2005-2026 Wilson Snyder
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// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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//
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//*************************************************************************
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// Pre steps:
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// Attach clocks to each assertion
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// Substitute property references by property body (IEEE 1800-2012 16.12.1).
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// Transform clocking blocks into imperative logic
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//*************************************************************************
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#include "V3PchAstNoMT.h" // VL_MT_DISABLED_CODE_UNIT
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#include "V3AssertPre.h"
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#include "V3Const.h"
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#include "V3Task.h"
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#include "V3UniqueNames.h"
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VL_DEFINE_DEBUG_FUNCTIONS;
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//######################################################################
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// Assert class functions
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class AssertPreVisitor final : public VNVisitor {
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// Removes clocks and other pre-optimizations
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// Eventually inlines calls to sequences, properties, etc.
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// We're not parsing the tree, or anything more complicated.
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private:
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// NODE STATE
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// AstClockingItem::user1p() // AstVar*. varp() of ClockingItem after unlink
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const VNUser1InUse m_inuser1;
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// STATE
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// Current context:
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AstNetlist* const m_netlistp = nullptr; // Current netlist
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AstNodeModule* m_modp = nullptr; // Current module
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AstClocking* m_clockingp = nullptr; // Current clocking block
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// Reset each module:
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AstClocking* m_defaultClockingp = nullptr; // Default clocking for current module
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AstVar* m_defaultClkEvtVarp = nullptr; // Event var for default clocking (for ##0)
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AstDefaultDisable* m_defaultDisablep = nullptr; // Default disable for current module
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// Reset each assertion:
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AstSenItem* m_senip = nullptr; // Last sensitivity
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// Reset each always:
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AstSenItem* m_seniAlwaysp = nullptr; // Last sensitivity in always
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// Reset each assertion:
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AstNodeExpr* m_disablep = nullptr; // Last disable
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AstIf* m_disableSeqIfp = nullptr; // Used for handling disable iff in sequences
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// Other:
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V3UniqueNames m_cycleDlyNames{"__VcycleDly"}; // Cycle delay counter name generator
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V3UniqueNames m_disableCntNames{"__VdisableCnt"}; // Disable condition counter name generator
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bool m_inAssign = false; // True if in an AssignNode
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bool m_inAssignDlyLhs = false; // True if in AssignDly's LHS
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bool m_inSynchDrive = false; // True if in synchronous drive
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std::vector<AstVarXRef*> m_xrefsp; // list of xrefs that need name fixup
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bool m_inPExpr = false; // True if in AstPExpr
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std::vector<AstSequence*> m_seqsToCleanup; // Sequences to clean up after traversal
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// METHODS
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AstSenTree* newSenTree(AstNode* nodep, AstSenTree* useTreep = nullptr,
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AstNodeCoverOrAssert* cassertp = nullptr) {
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// Create sentree based on clocked or default clock
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// Return nullptr for always
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if (useTreep) return useTreep;
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AstSenTree* newp = nullptr;
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AstSenItem* senip = m_senip;
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bool fromAlways = false;
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if (!senip && m_defaultClockingp) senip = m_defaultClockingp->sensesp();
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if (!senip) {
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senip = m_seniAlwaysp;
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fromAlways = true;
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}
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if (!senip) {
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nodep->v3warn(E_UNSUPPORTED, "Unsupported: Unclocked assertion");
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newp = new AstSenTree{nodep->fileline(), nullptr};
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} else {
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if (cassertp && fromAlways) cassertp->senFromAlways(true);
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newp = new AstSenTree{nodep->fileline(), senip->cloneTree(true)};
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}
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return newp;
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}
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AstNodeExpr* getSequenceBodyExprp(const AstSequence* const seqp) const {
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// The statements in AstSequence are optional AstVar (ports) followed by body expr.
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AstNode* bodyp = seqp->stmtsp();
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while (bodyp && VN_IS(bodyp, Var)) bodyp = bodyp->nextp();
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return VN_CAST(bodyp, NodeExpr);
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}
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AstPropSpec* getPropertyExprp(const AstProperty* const propp) {
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// The only statements possible in AstProperty are AstPropSpec (body)
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// and AstVar (arguments).
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AstNode* propExprp = propp->stmtsp();
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while (VN_IS(propExprp, Var)) propExprp = propExprp->nextp();
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return VN_CAST(propExprp, PropSpec);
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}
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void substituteSequenceCall(AstFuncRef* funcrefp, AstSequence* seqp) {
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// IEEE 1800-2023 16.7 (sequence declarations), 16.8 (sequence instances)
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// Inline the sequence body at the call site, replacing the FuncRef
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AstNodeExpr* bodyExprp = getSequenceBodyExprp(seqp);
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UASSERT_OBJ(bodyExprp, funcrefp, "Sequence has no body expression");
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// Clone the body expression since the sequence may be referenced multiple times
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AstNodeExpr* clonedp = bodyExprp->cloneTree(false);
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// Substitute formal arguments with actual arguments
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const V3TaskConnects tconnects = V3Task::taskConnects(funcrefp, seqp->stmtsp());
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for (const auto& tconnect : tconnects) {
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const AstVar* const portp = tconnect.first;
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AstArg* const argp = tconnect.second;
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clonedp->foreach([&](AstVarRef* refp) {
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if (refp->varp() == portp) {
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refp->replaceWith(argp->exprp()->cloneTree(false));
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VL_DO_DANGLING(pushDeletep(refp), refp);
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}
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});
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pushDeletep(argp->exprp()->unlinkFrBack());
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}
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// Replace the FuncRef with the inlined body
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funcrefp->replaceWith(clonedp);
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VL_DO_DANGLING(pushDeletep(funcrefp), funcrefp);
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// Clear referenced flag; sequences with isReferenced==false are deleted in assertPreAll
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seqp->isReferenced(false);
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}
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AstPropSpec* substitutePropertyCall(AstPropSpec* nodep) {
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if (AstFuncRef* const funcrefp = VN_CAST(nodep->propp(), FuncRef)) {
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if (const AstProperty* const propp = VN_CAST(funcrefp->taskp(), Property)) {
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AstPropSpec* propExprp = getPropertyExprp(propp);
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// Substitute inner property call before copying in order to not doing the same for
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// each call of outer property call.
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propExprp = substitutePropertyCall(propExprp);
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// Clone subtree after substitution. It is needed, because property might be called
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// multiple times with different arguments.
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propExprp = propExprp->cloneTree(false);
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// Substitute formal arguments with actual arguments
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const V3TaskConnects tconnects = V3Task::taskConnects(funcrefp, propp->stmtsp());
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for (const auto& tconnect : tconnects) {
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const AstVar* const portp = tconnect.first;
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// cppcheck-suppress constVariablePointer // 'exprp' unlinked below
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AstArg* const argp = tconnect.second;
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propExprp->foreach([&](AstVarRef* refp) {
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if (refp->varp() == portp) {
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refp->replaceWith(argp->exprp()->cloneTree(false));
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VL_DO_DANGLING(pushDeletep(refp), refp);
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}
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});
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pushDeletep(argp->exprp()->unlinkFrBack());
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}
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// Handle case with 2 disable iff statement (IEEE 1800-2023 16.12.1)
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if (nodep->disablep() && propExprp->disablep()) {
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nodep->v3error("disable iff expression before property call and in its "
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"body is not legal");
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pushDeletep(propExprp->disablep()->unlinkFrBack());
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}
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// If disable iff is in outer property, move it to inner
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if (nodep->disablep()) {
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AstNodeExpr* const disablep = nodep->disablep()->unlinkFrBack();
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propExprp->disablep(disablep);
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}
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if (nodep->sensesp() && propExprp->sensesp()) {
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nodep->v3warn(E_UNSUPPORTED,
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"Unsupported: Clock event before property call and in its body");
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pushDeletep(propExprp->sensesp()->unlinkFrBack());
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}
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// If clock event is in outer property, move it to inner
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if (nodep->sensesp()) {
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AstSenItem* const sensesp = nodep->sensesp();
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sensesp->unlinkFrBack();
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propExprp->sensesp(sensesp);
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}
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// Now substitute property reference with property body
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nodep->replaceWith(propExprp);
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VL_DO_DANGLING(pushDeletep(nodep), nodep);
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return propExprp;
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}
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}
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return nodep;
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}
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// VISITORS
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//========== Statements
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void visit(AstClocking* const nodep) override {
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VL_RESTORER(m_clockingp);
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m_clockingp = nodep;
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UINFO(8, " CLOCKING" << nodep);
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iterateChildren(nodep);
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if (nodep->eventp()) nodep->addNextHere(nodep->eventp()->unlinkFrBack());
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VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
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}
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void visit(AstModportClockingRef* const nodep) override {
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// It has to be converted to a list of ModportClockingVarRefs,
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// because clocking blocks are removed in this pass
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for (AstNode* itemp = nodep->clockingp()->itemsp(); itemp; itemp = itemp->nextp()) {
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if (const AstClockingItem* citemp = VN_CAST(itemp, ClockingItem)) {
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if (AstVar* const varp
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= citemp->varp() ? citemp->varp() : VN_AS(citemp->user1p(), Var)) {
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AstModportVarRef* const modVarp = new AstModportVarRef{
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nodep->fileline(), varp->name(), citemp->direction()};
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modVarp->varp(varp);
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nodep->addNextHere(modVarp);
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}
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}
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}
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VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
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}
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void visit(AstClockingItem* const nodep) override {
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// Get a ref to the sampled/driven variable
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AstVar* const varp = nodep->varp();
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if (!varp) {
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// Unused item
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return;
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}
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FileLine* const flp = nodep->fileline();
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V3Const::constifyEdit(nodep->skewp());
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if (!VN_IS(nodep->skewp(), Const)) {
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nodep->skewp()->v3error("Skew must be constant (IEEE 1800-2023 14.4)");
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return;
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}
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AstConst* const skewp = VN_AS(nodep->skewp(), Const);
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if (skewp->num().isNegative()) skewp->v3error("Skew cannot be negative");
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AstNodeExpr* const exprp = nodep->exprp();
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varp->name(m_clockingp->name() + "__DOT__" + varp->name());
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m_clockingp->addNextHere(varp->unlinkFrBack());
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nodep->user1p(varp);
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varp->user1p(nodep);
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if (nodep->direction() == VDirection::OUTPUT) {
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exprp->foreach([](const AstNodeVarRef* varrefp) {
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// Prevent confusing BLKANDNBLK warnings on clockvars due to generated assignments
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varrefp->fileline()->warnOff(V3ErrorCode::BLKANDNBLK, true);
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});
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AstVarRef* const skewedReadRefp = new AstVarRef{flp, varp, VAccess::READ};
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skewedReadRefp->user1(true);
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// Initialize the clockvar
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AstVarRef* const skewedWriteRefp = new AstVarRef{flp, varp, VAccess::WRITE};
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skewedWriteRefp->user1(true);
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AstInitialStatic* const initClockvarp = new AstInitialStatic{
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flp, new AstAssign{flp, skewedWriteRefp, exprp->cloneTreePure(false)}};
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m_modp->addStmtsp(initClockvarp);
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// A var to keep the previous value of the clockvar
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AstVar* const prevVarp = new AstVar{
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flp, VVarType::MODULETEMP, "__Vclocking_prev__" + varp->name(), exprp->dtypep()};
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prevVarp->lifetime(VLifetime::STATIC_EXPLICIT);
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AstInitialStatic* const initPrevClockvarp = new AstInitialStatic{
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flp, new AstAssign{flp, new AstVarRef{flp, prevVarp, VAccess::WRITE},
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skewedReadRefp->cloneTreePure(false)}};
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m_modp->addStmtsp(prevVarp);
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m_modp->addStmtsp(initPrevClockvarp);
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// Assign the clockvar to the actual var; only do it if the clockvar's value has
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// changed
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AstAssign* const assignp
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= new AstAssign{flp, exprp->cloneTreePure(false), skewedReadRefp};
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AstIf* const ifp
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= new AstIf{flp,
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new AstNeq{flp, new AstVarRef{flp, prevVarp, VAccess::READ},
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skewedReadRefp->cloneTreePure(false)},
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assignp};
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ifp->addThensp(new AstAssign{flp, new AstVarRef{flp, prevVarp, VAccess::WRITE},
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skewedReadRefp->cloneTree(false)});
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if (skewp->isZero()) {
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// Drive the var in Re-NBA (IEEE 1800-2023 14.16)
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AstSenTree* senTreep
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= new AstSenTree{flp, m_clockingp->sensesp()->cloneTree(false)};
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senTreep->addSensesp(
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new AstSenItem{flp, VEdgeType::ET_CHANGED, skewedReadRefp->cloneTree(false)});
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AstCMethodHard* const trigp = new AstCMethodHard{
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nodep->fileline(),
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new AstVarRef{flp, m_clockingp->ensureEventp(), VAccess::READ},
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VCMethod::EVENT_IS_TRIGGERED};
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trigp->dtypeSetBit();
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ifp->condp(new AstLogAnd{flp, ifp->condp()->unlinkFrBack(), trigp});
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m_clockingp->addNextHere(new AstAlwaysReactive{flp, senTreep, ifp});
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} else if (skewp->fileline()->timingOn()) {
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// Create a fork so that this AlwaysObserved can be retriggered before the
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// assignment happens. Also then it can be combo, avoiding the need for creating
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// new triggers.
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AstFork* const forkp = new AstFork{flp, VJoinType::JOIN_NONE};
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forkp->addForksp(new AstBegin{flp, "", ifp, true});
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// Use Observed for this to make sure we do not miss the event
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m_clockingp->addNextHere(new AstAlwaysObserved{
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flp, new AstSenTree{flp, m_clockingp->sensesp()->cloneTree(false)}, forkp});
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if (v3Global.opt.timing().isSetTrue()) {
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AstDelay* const delayp = new AstDelay{flp, skewp->unlinkFrBack(), false};
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delayp->timeunit(m_modp->timeunit());
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assignp->timingControlp(delayp);
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} else if (v3Global.opt.timing().isSetFalse()) {
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nodep->v3warn(E_NOTIMING,
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"Clocking output skew greater than #0 requires --timing");
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} else {
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nodep->v3warn(E_NEEDTIMINGOPT,
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"Use --timing or --no-timing to specify how "
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"clocking output skew greater than #0 should be handled");
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}
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}
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} else if (nodep->direction() == VDirection::INPUT) {
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// Ref to the clockvar
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AstVarRef* const refp = new AstVarRef{flp, varp, VAccess::WRITE};
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refp->user1(true);
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if (skewp->num().is1Step()) {
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// #1step means the value that is sampled is always the signal's last value
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// before the clock edge (IEEE 1800-2023 14.4)
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AstSampled* const sampledp = new AstSampled{flp, exprp->cloneTreePure(false)};
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sampledp->dtypeFrom(exprp);
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AstAssign* const assignp = new AstAssign{flp, refp, sampledp};
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m_clockingp->addNextHere(new AstAlways{
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flp, VAlwaysKwd::ALWAYS,
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new AstSenTree{flp, m_clockingp->sensesp()->cloneTree(false)}, assignp});
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} else if (skewp->isZero()) {
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// #0 means the var has to be sampled in Observed (IEEE 1800-2023 14.13)
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AstAssign* const assignp = new AstAssign{flp, refp, exprp->cloneTreePure(false)};
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m_clockingp->addNextHere(new AstAlwaysObserved{
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flp, new AstSenTree{flp, m_clockingp->sensesp()->cloneTree(false)}, assignp});
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} else {
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// Create a queue where we'll store sampled values with timestamps
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AstSampleQueueDType* const queueDtp
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= new AstSampleQueueDType{flp, exprp->dtypep()};
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m_netlistp->typeTablep()->addTypesp(queueDtp);
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AstVar* const queueVarp
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= new AstVar{flp, VVarType::MODULETEMP, "__Vqueue__" + varp->name(), queueDtp};
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queueVarp->lifetime(VLifetime::STATIC_EXPLICIT);
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m_clockingp->addNextHere(queueVarp);
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// Create a process like this:
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// always queue.push(<sampled var>);
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AstCMethodHard* const pushp = new AstCMethodHard{
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flp, new AstVarRef{flp, queueVarp, VAccess::WRITE}, VCMethod::DYN_PUSH,
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new AstTime{nodep->fileline(), m_modp->timeunit()}};
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pushp->addPinsp(exprp->cloneTreePure(false));
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pushp->dtypeSetVoid();
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m_clockingp->addNextHere(
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new AstAlways{flp, VAlwaysKwd::ALWAYS, nullptr, pushp->makeStmt()});
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// Create a process like this:
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// always @<clocking event> queue.pop(<skew>, /*out*/<skewed var>);
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AstCMethodHard* const popp = new AstCMethodHard{
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flp, new AstVarRef{flp, queueVarp, VAccess::READWRITE}, VCMethod::DYN_POP,
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new AstTime{nodep->fileline(), m_modp->timeunit()}};
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popp->addPinsp(skewp->unlinkFrBack());
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popp->addPinsp(refp);
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popp->dtypeSetVoid();
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m_clockingp->addNextHere(
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new AstAlways{flp, VAlwaysKwd::ALWAYS,
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new AstSenTree{flp, m_clockingp->sensesp()->cloneTree(false)},
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popp->makeStmt()});
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}
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} else {
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nodep->v3fatalSrc("Invalid direction");
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}
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}
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void visit(AstDelay* nodep) override {
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// Only cycle delays are relevant in this stage; also only process once
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if (!nodep->isCycleDelay()) {
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if (m_inSynchDrive) {
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nodep->v3error("Only cycle delays can be used in synchronous drives"
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" (IEEE 1800-2023 14.16)");
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}
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iterateChildren(nodep);
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return;
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}
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if (m_inAssign && !m_inSynchDrive) {
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nodep->v3error("Cycle delays not allowed as intra-assignment delays"
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" (IEEE 1800-2023 14.11)");
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VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
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return;
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}
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if (nodep->stmtsp()) nodep->addNextHere(nodep->stmtsp()->unlinkFrBackWithNext());
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FileLine* const flp = nodep->fileline();
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AstNodeExpr* valuep = V3Const::constifyEdit(nodep->lhsp()->unlinkFrBack());
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const AstConst* const constp = VN_CAST(valuep, Const);
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if (!constp) {
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nodep->v3error(
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"Delay value is not an elaboration-time constant (IEEE 1800-2023 16.7)");
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} else if (constp->isZero()) {
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VL_DO_DANGLING(pushDeletep(valuep), valuep);
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if (m_inSynchDrive) {
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// ##0 has no effect in synchronous drives (IEEE 1800-2023 14.11)
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VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
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return;
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}
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if (m_inPExpr) {
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// ##0 in sequence context = zero delay = same clock tick
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VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
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return;
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}
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// Procedural ##0: synchronize with default clocking event (IEEE 1800-2023 14.11)
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// If the clocking event has not yet occurred this timestep, wait for it;
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// otherwise continue without suspension.
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if (!m_defaultClockingp) {
|
|
nodep->v3error("Usage of cycle delays requires default clocking"
|
|
" (IEEE 1800-2023 14.11)");
|
|
VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
|
|
return;
|
|
}
|
|
AstVar* const evtVarp = m_defaultClkEvtVarp;
|
|
UASSERT_OBJ(evtVarp, nodep, "Default clocking event var not pre-created");
|
|
AstCMethodHard* const isTriggeredp = new AstCMethodHard{
|
|
flp, new AstVarRef{flp, evtVarp, VAccess::READ}, VCMethod::EVENT_IS_TRIGGERED};
|
|
isTriggeredp->dtypeSetBit();
|
|
AstEventControl* const waitp = new AstEventControl{
|
|
flp,
|
|
new AstSenTree{flp, new AstSenItem{flp, VEdgeType::ET_EVENT,
|
|
new AstVarRef{flp, evtVarp, VAccess::READ}}},
|
|
nullptr};
|
|
AstIf* const ifp = new AstIf{flp, new AstNot{flp, isTriggeredp}, waitp};
|
|
nodep->replaceWith(ifp);
|
|
VL_DO_DANGLING(pushDeletep(nodep), nodep);
|
|
return;
|
|
}
|
|
AstSenItem* sensesp = nullptr;
|
|
if (!m_defaultClockingp) {
|
|
if (!m_inPExpr) {
|
|
nodep->v3error("Usage of cycle delays requires default clocking"
|
|
" (IEEE 1800-2023 14.11)");
|
|
VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
|
|
VL_DO_DANGLING(valuep->deleteTree(), valuep);
|
|
return;
|
|
}
|
|
sensesp = m_senip;
|
|
} else {
|
|
sensesp = m_defaultClockingp->sensesp();
|
|
}
|
|
AstEventControl* const controlp = new AstEventControl{
|
|
nodep->fileline(), new AstSenTree{flp, sensesp->cloneTree(false)}, nullptr};
|
|
const std::string delayName = m_cycleDlyNames.get(nodep);
|
|
AstVar* const cntVarp = new AstVar{flp, VVarType::BLOCKTEMP, delayName + "__counter",
|
|
nodep->findBasicDType(VBasicDTypeKwd::UINT32)};
|
|
cntVarp->lifetime(VLifetime::AUTOMATIC_EXPLICIT);
|
|
AstBegin* const beginp = new AstBegin{flp, delayName + "__block", cntVarp, true};
|
|
beginp->addStmtsp(new AstAssign{flp, new AstVarRef{flp, cntVarp, VAccess::WRITE}, valuep});
|
|
|
|
{
|
|
AstLoop* const loopp = new AstLoop{flp};
|
|
loopp->addStmtsp(new AstLoopTest{
|
|
flp, loopp,
|
|
new AstGt{flp, new AstVarRef{flp, cntVarp, VAccess::READ}, new AstConst{flp, 0}}});
|
|
loopp->addStmtsp(controlp);
|
|
loopp->addStmtsp(
|
|
new AstAssign{flp, new AstVarRef{flp, cntVarp, VAccess::WRITE},
|
|
new AstSub{flp, new AstVarRef{flp, cntVarp, VAccess::READ},
|
|
new AstConst{flp, 1}}});
|
|
beginp->addStmtsp(loopp);
|
|
}
|
|
if (m_disableSeqIfp) {
|
|
AstIf* const disableSeqIfp = m_disableSeqIfp->cloneTree(false);
|
|
disableSeqIfp->addThensp(nodep->nextp()->unlinkFrBackWithNext());
|
|
nodep->addNextHere(disableSeqIfp);
|
|
}
|
|
nodep->replaceWith(beginp);
|
|
VL_DO_DANGLING(nodep->deleteTree(), nodep);
|
|
}
|
|
void visit(AstSenTree* nodep) override {
|
|
if (m_inSynchDrive) {
|
|
nodep->v3error("Event controls cannot be used in "
|
|
"synchronous drives (IEEE 1800-2023 14.16)");
|
|
}
|
|
|
|
const AstSampled* sampledp;
|
|
if (nodep->exists([&sampledp](const AstSampled* const sp) {
|
|
sampledp = sp;
|
|
return true;
|
|
})) {
|
|
sampledp->v3warn(E_UNSUPPORTED, "Unsupported: $sampled inside sensitivity list");
|
|
}
|
|
}
|
|
void visit(AstNodeVarRef* nodep) override {
|
|
UINFO(8, " -varref: " << nodep);
|
|
UINFO(8, " -varref-var-back: " << nodep->varp()->backp());
|
|
UINFO(8, " -varref-var-user1: " << nodep->varp()->user1p());
|
|
if (AstClockingItem* const itemp = VN_CAST(
|
|
nodep->varp()->user1p() ? nodep->varp()->user1p() : nodep->varp()->firstAbovep(),
|
|
ClockingItem)) {
|
|
if (nodep->user1()) return;
|
|
|
|
// ensure linking still works, this has to be done only once
|
|
if (AstVarXRef* xrefp = VN_CAST(nodep, VarXRef)) {
|
|
UINFO(8, " -clockvarxref-in: " << xrefp);
|
|
string dotted = xrefp->dotted();
|
|
const size_t dotPos = dotted.rfind('.');
|
|
dotted.erase(dotPos, string::npos);
|
|
xrefp->dotted(dotted);
|
|
UINFO(8, " -clockvarxref-out: " << xrefp);
|
|
m_xrefsp.emplace_back(xrefp);
|
|
}
|
|
|
|
if (nodep->access().isReadOrRW() && itemp->direction() == VDirection::OUTPUT) {
|
|
nodep->v3error("Cannot read from output clockvar (IEEE 1800-2023 14.3)");
|
|
}
|
|
if (nodep->access().isWriteOrRW()) {
|
|
if (itemp->direction() == VDirection::OUTPUT) {
|
|
if (!m_inAssignDlyLhs) {
|
|
nodep->v3error("Only non-blocking assignments can write "
|
|
"to clockvars (IEEE 1800-2023 14.16)");
|
|
}
|
|
if (m_inAssign) m_inSynchDrive = true;
|
|
} else if (itemp->direction() == VDirection::INPUT) {
|
|
nodep->v3error("Cannot write to input clockvar (IEEE 1800-2023 14.3)");
|
|
}
|
|
}
|
|
nodep->user1(true);
|
|
}
|
|
}
|
|
void visit(AstMemberSel* nodep) override {
|
|
if (AstClockingItem* const itemp = VN_CAST(
|
|
nodep->varp()->user1p() ? nodep->varp()->user1p() : nodep->varp()->firstAbovep(),
|
|
ClockingItem)) {
|
|
if (nodep->access().isReadOrRW() && itemp->direction() == VDirection::OUTPUT) {
|
|
nodep->v3error("Cannot read from output clockvar (IEEE 1800-2023 14.3)");
|
|
}
|
|
if (nodep->access().isWriteOrRW()) {
|
|
if (itemp->direction() == VDirection::OUTPUT) {
|
|
if (!m_inAssignDlyLhs) {
|
|
nodep->v3error("Only non-blocking assignments can write "
|
|
"to clockvars (IEEE 1800-2023 14.16)");
|
|
}
|
|
if (m_inAssign) m_inSynchDrive = true;
|
|
} else if (itemp->direction() == VDirection::INPUT) {
|
|
nodep->v3error("Cannot write to input clockvar (IEEE 1800-2023 14.3)");
|
|
}
|
|
}
|
|
}
|
|
}
|
|
void visit(AstNodeAssign* nodep) override {
|
|
if (nodep->user1()) return;
|
|
VL_RESTORER(m_inAssign);
|
|
VL_RESTORER(m_inSynchDrive);
|
|
m_inAssign = true;
|
|
m_inSynchDrive = false;
|
|
{
|
|
VL_RESTORER(m_inAssignDlyLhs);
|
|
m_inAssignDlyLhs = VN_IS(nodep, AssignDly);
|
|
iterate(nodep->lhsp());
|
|
}
|
|
iterate(nodep->rhsp());
|
|
if (nodep->timingControlp()) {
|
|
iterate(nodep->timingControlp());
|
|
} else if (m_inSynchDrive) {
|
|
AstAssign* const assignp = new AstAssign{
|
|
nodep->fileline(), nodep->lhsp()->unlinkFrBack(), nodep->rhsp()->unlinkFrBack()};
|
|
assignp->user1(true);
|
|
nodep->replaceWith(assignp);
|
|
VL_DO_DANGLING(nodep->deleteTree(), nodep);
|
|
}
|
|
}
|
|
void visit(AstAlways* nodep) override {
|
|
iterateAndNextNull(nodep->sentreep());
|
|
if (nodep->sentreep()) m_seniAlwaysp = nodep->sentreep()->sensesp();
|
|
iterateAndNextNull(nodep->stmtsp());
|
|
m_seniAlwaysp = nullptr;
|
|
}
|
|
|
|
void visit(AstNodeCoverOrAssert* nodep) override {
|
|
if (nodep->sentreep()) return; // Already processed
|
|
|
|
VL_RESTORER(m_senip);
|
|
VL_RESTORER(m_disablep);
|
|
m_senip = nullptr;
|
|
m_disablep = nullptr;
|
|
|
|
// Find Clocking's buried under nodep->exprsp
|
|
iterateChildren(nodep);
|
|
if (!nodep->immediate()) nodep->sentreep(newSenTree(nodep, nullptr, nodep));
|
|
}
|
|
void visit(AstFalling* nodep) override {
|
|
if (nodep->user1SetOnce()) return;
|
|
iterateChildren(nodep);
|
|
FileLine* const fl = nodep->fileline();
|
|
AstNodeExpr* exprp = nodep->exprp()->unlinkFrBack();
|
|
if (exprp->width() > 1) exprp = new AstSel{fl, exprp, 0, 1};
|
|
AstNodeExpr* const futurep = new AstFuture{fl, exprp, newSenTree(nodep)};
|
|
futurep->dtypeFrom(exprp);
|
|
exprp = new AstAnd{fl, exprp->cloneTreePure(false), new AstNot{fl, futurep}};
|
|
exprp->dtypeSetBit();
|
|
nodep->replaceWith(exprp);
|
|
VL_DO_DANGLING(pushDeletep(nodep), nodep);
|
|
}
|
|
void visit(AstFell* nodep) override {
|
|
if (nodep->user1SetOnce()) return;
|
|
iterateChildren(nodep);
|
|
FileLine* const fl = nodep->fileline();
|
|
AstNodeExpr* exprp = nodep->exprp()->unlinkFrBack();
|
|
if (exprp->width() > 1) exprp = new AstSel{fl, exprp, 0, 1};
|
|
AstSenTree* sentreep = nodep->sentreep();
|
|
if (sentreep) sentreep->unlinkFrBack();
|
|
AstPast* const pastp = new AstPast{fl, exprp};
|
|
pastp->dtypeFrom(exprp);
|
|
pastp->sentreep(newSenTree(nodep, sentreep));
|
|
exprp = new AstAnd{fl, pastp, new AstNot{fl, exprp->cloneTreePure(false)}};
|
|
exprp->dtypeSetBit();
|
|
nodep->replaceWith(exprp);
|
|
VL_DO_DANGLING(pushDeletep(nodep), nodep);
|
|
}
|
|
void visit(AstFuture* nodep) override {
|
|
if (nodep->user1SetOnce()) return;
|
|
iterateChildren(nodep);
|
|
AstSenTree* const sentreep = nodep->sentreep();
|
|
if (sentreep) VL_DO_DANGLING(pushDeletep(sentreep->unlinkFrBack()), sentreep);
|
|
nodep->sentreep(newSenTree(nodep));
|
|
}
|
|
void visit(AstPast* nodep) override {
|
|
if (nodep->sentreep()) return; // Already processed
|
|
iterateChildren(nodep);
|
|
nodep->sentreep(newSenTree(nodep));
|
|
}
|
|
void visit(AstRising* nodep) override {
|
|
if (nodep->user1SetOnce()) return;
|
|
iterateChildren(nodep);
|
|
FileLine* const fl = nodep->fileline();
|
|
AstNodeExpr* exprp = nodep->exprp()->unlinkFrBack();
|
|
if (exprp->width() > 1) exprp = new AstSel{fl, exprp, 0, 1};
|
|
AstNodeExpr* const futurep = new AstFuture{fl, exprp, newSenTree(nodep)};
|
|
futurep->dtypeFrom(exprp);
|
|
exprp = new AstAnd{fl, new AstNot{fl, exprp->cloneTreePure(false)}, futurep};
|
|
exprp->dtypeSetBit();
|
|
nodep->replaceWith(exprp);
|
|
VL_DO_DANGLING(pushDeletep(nodep), nodep);
|
|
}
|
|
void visit(AstRose* nodep) override {
|
|
if (nodep->user1SetOnce()) return;
|
|
iterateChildren(nodep);
|
|
FileLine* const fl = nodep->fileline();
|
|
AstNodeExpr* exprp = nodep->exprp()->unlinkFrBack();
|
|
if (exprp->width() > 1) exprp = new AstSel{fl, exprp, 0, 1};
|
|
AstSenTree* sentreep = nodep->sentreep();
|
|
if (sentreep) sentreep->unlinkFrBack();
|
|
AstPast* const pastp = new AstPast{fl, exprp};
|
|
pastp->dtypeFrom(exprp);
|
|
pastp->sentreep(newSenTree(nodep, sentreep));
|
|
exprp = new AstAnd{fl, new AstNot{fl, pastp}, exprp->cloneTreePure(false)};
|
|
exprp->dtypeSetBit();
|
|
nodep->replaceWith(exprp);
|
|
VL_DO_DANGLING(pushDeletep(nodep), nodep);
|
|
}
|
|
void visit(AstStable* nodep) override {
|
|
if (nodep->user1SetOnce()) return;
|
|
iterateChildren(nodep);
|
|
FileLine* const fl = nodep->fileline();
|
|
AstNodeExpr* exprp = nodep->exprp()->unlinkFrBack();
|
|
AstSenTree* sentreep = nodep->sentreep();
|
|
if (sentreep) sentreep->unlinkFrBack();
|
|
AstPast* const pastp = new AstPast{fl, exprp};
|
|
pastp->dtypeFrom(exprp);
|
|
pastp->sentreep(newSenTree(nodep, sentreep));
|
|
exprp = new AstEq{fl, pastp, exprp->cloneTreePure(false)};
|
|
exprp->dtypeSetBit();
|
|
nodep->replaceWith(exprp);
|
|
VL_DO_DANGLING(pushDeletep(nodep), nodep);
|
|
}
|
|
void visit(AstSteady* nodep) override {
|
|
if (nodep->user1SetOnce()) return;
|
|
iterateChildren(nodep);
|
|
FileLine* const fl = nodep->fileline();
|
|
AstNodeExpr* exprp = nodep->exprp()->unlinkFrBack();
|
|
if (exprp->width() > 1) exprp = new AstSel{fl, exprp, 0, 1};
|
|
AstNodeExpr* const futurep = new AstFuture{fl, exprp, newSenTree(nodep)};
|
|
futurep->dtypeFrom(exprp);
|
|
exprp = new AstEq{fl, exprp->cloneTreePure(false), futurep};
|
|
exprp->dtypeSetBit();
|
|
nodep->replaceWith(exprp);
|
|
VL_DO_DANGLING(pushDeletep(nodep), nodep);
|
|
}
|
|
|
|
void visit(AstFuncRef* nodep) override {
|
|
// IEEE 1800-2023 16.8: Inline sequence instances wherever they appear
|
|
// in the expression tree (inside implications, boolean ops, nested refs, etc.)
|
|
if (AstSequence* const seqp = VN_CAST(nodep->taskp(), Sequence)) {
|
|
substituteSequenceCall(nodep, seqp);
|
|
// The FuncRef has been replaced; do not access nodep after this point.
|
|
// The replacement node will be visited by the parent's iterateChildren.
|
|
return;
|
|
}
|
|
iterateChildren(nodep);
|
|
}
|
|
void visit(AstImplication* nodep) override {
|
|
if (nodep->sentreep()) return; // Already processed
|
|
|
|
iterateChildren(nodep);
|
|
|
|
FileLine* const flp = nodep->fileline();
|
|
AstNodeExpr* const rhsp = nodep->rhsp()->unlinkFrBack();
|
|
AstNodeExpr* lhsp = nodep->lhsp()->unlinkFrBack();
|
|
if (AstPExpr* const pexprp = VN_CAST(rhsp, PExpr)) {
|
|
// Implication with sequence expression on RHS (IEEE 1800-2023 16.11, 16.12.7).
|
|
// The PExpr was already lowered from the property expression by V3AssertProp.
|
|
// Wrap the PExpr body with the antecedent check so the sequence only
|
|
// starts when the antecedent holds.
|
|
AstNodeExpr* condp;
|
|
if (nodep->isOverlapped()) {
|
|
// Overlapped implication (|->): check antecedent on same cycle.
|
|
// disable iff is applied at the assertion level, not at the
|
|
// antecedent gate, matching the existing non-PExpr overlapped path.
|
|
condp = new AstSampled{flp, lhsp};
|
|
condp->dtypeFrom(lhsp);
|
|
} else {
|
|
// Non-overlapped implication (|=>): check antecedent from previous cycle
|
|
if (m_disablep) {
|
|
lhsp
|
|
= new AstAnd{flp, new AstNot{flp, m_disablep->cloneTreePure(false)}, lhsp};
|
|
}
|
|
AstPast* const pastp = new AstPast{flp, lhsp};
|
|
pastp->dtypeFrom(lhsp);
|
|
pastp->sentreep(newSenTree(nodep));
|
|
condp = pastp;
|
|
}
|
|
// Wrap existing PExpr body: if (antecedent) { <original body> } else { /* vacuous pass
|
|
// */ }
|
|
AstBegin* const bodyp = pexprp->bodyp();
|
|
AstNode* const origStmtsp = bodyp->stmtsp()->unlinkFrBackWithNext();
|
|
AstIf* const guardp = new AstIf{flp, condp, origStmtsp};
|
|
bodyp->addStmtsp(guardp);
|
|
nodep->replaceWith(pexprp);
|
|
} else if (nodep->isOverlapped()) {
|
|
nodep->replaceWith(new AstLogOr{flp, new AstLogNot{flp, lhsp}, rhsp});
|
|
} else {
|
|
if (m_disablep) {
|
|
lhsp = new AstAnd{flp, new AstNot{flp, m_disablep->cloneTreePure(false)}, lhsp};
|
|
}
|
|
|
|
AstPast* const pastp = new AstPast{flp, lhsp};
|
|
pastp->dtypeFrom(lhsp);
|
|
pastp->sentreep(newSenTree(nodep));
|
|
AstNodeExpr* const exprp = new AstOr{flp, new AstNot{flp, pastp}, rhsp};
|
|
exprp->dtypeSetBit();
|
|
nodep->replaceWith(exprp);
|
|
}
|
|
VL_DO_DANGLING(pushDeletep(nodep), nodep);
|
|
}
|
|
|
|
void visit(AstDefaultDisable* nodep) override {
|
|
// Done with these
|
|
VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
|
|
}
|
|
void visit(AstInferredDisable* nodep) override {
|
|
AstNode* newp;
|
|
if (m_defaultDisablep) {
|
|
newp = m_defaultDisablep->condp()->cloneTreePure(true);
|
|
} else {
|
|
newp = new AstConst{nodep->fileline(), AstConst::BitFalse{}};
|
|
}
|
|
nodep->replaceWith(newp);
|
|
VL_DO_DANGLING(pushDeletep(nodep), nodep);
|
|
}
|
|
|
|
void visit(AstPropSpec* nodep) override {
|
|
nodep = substitutePropertyCall(nodep);
|
|
iterateAndNextNull(nodep->sensesp());
|
|
if (m_senip && m_senip != nodep->sensesp())
|
|
nodep->v3warn(E_UNSUPPORTED, "Unsupported: Only one PSL clock allowed per assertion");
|
|
if (!nodep->disablep() && m_defaultDisablep) {
|
|
nodep->disablep(m_defaultDisablep->condp()->cloneTreePure(true));
|
|
}
|
|
m_disablep = nodep->disablep();
|
|
// Unlink and just keep a pointer to it, convert to sentree as needed
|
|
m_senip = nodep->sensesp();
|
|
iterateNull(nodep->disablep());
|
|
if (!VN_AS(nodep->backp(), NodeCoverOrAssert)->immediate()) {
|
|
const AstNodeDType* const propDtp = nodep->propp()->dtypep();
|
|
nodep->propp(new AstSampled{nodep->fileline(), nodep->propp()->unlinkFrBack()});
|
|
nodep->propp()->dtypeFrom(propDtp);
|
|
}
|
|
iterate(nodep->propp());
|
|
}
|
|
void visit(AstPExpr* nodep) override {
|
|
if (AstLogNot* const notp = VN_CAST(nodep->backp(), LogNot)) {
|
|
notp->replaceWith(nodep->unlinkFrBack());
|
|
VL_DO_DANGLING(pushDeletep(notp), notp);
|
|
iterate(nodep);
|
|
return;
|
|
}
|
|
// Sequence expression as antecedent of implication is not yet supported
|
|
if (AstImplication* const implp = VN_CAST(nodep->backp(), Implication)) {
|
|
if (implp->lhsp() == nodep) {
|
|
implp->v3warn(E_UNSUPPORTED,
|
|
"Unsupported: Implication with sequence expression as antecedent");
|
|
nodep->replaceWith(new AstConst{nodep->fileline(), AstConst::BitFalse{}});
|
|
VL_DO_DANGLING(pushDeletep(nodep), nodep);
|
|
return;
|
|
}
|
|
}
|
|
VL_RESTORER(m_inPExpr);
|
|
VL_RESTORER(m_disableSeqIfp);
|
|
m_inPExpr = true;
|
|
|
|
if (m_disablep) {
|
|
const AstSampled* sampledp;
|
|
if (m_disablep->exists([&sampledp](const AstSampled* const sp) {
|
|
sampledp = sp;
|
|
return true;
|
|
})) {
|
|
sampledp->v3warn(E_UNSUPPORTED,
|
|
"Unsupported: $sampled inside disabled condition of a sequence");
|
|
m_disablep = new AstConst{m_disablep->fileline(), AstConst::BitFalse{}};
|
|
// always a copy is used, so remove it now
|
|
pushDeletep(m_disablep);
|
|
}
|
|
FileLine* const flp = nodep->fileline();
|
|
// Add counter which counts times the condition turned true
|
|
AstVar* const disableCntp
|
|
= new AstVar{flp, VVarType::MODULETEMP, m_disableCntNames.get(""),
|
|
nodep->findBasicDType(VBasicDTypeKwd::UINT32)};
|
|
disableCntp->lifetime(VLifetime::STATIC_EXPLICIT);
|
|
m_modp->addStmtsp(disableCntp);
|
|
AstVarRef* const readCntRefp = new AstVarRef{flp, disableCntp, VAccess::READ};
|
|
AstVarRef* const writeCntRefp = new AstVarRef{flp, disableCntp, VAccess::WRITE};
|
|
AstAssign* const incrStmtp = new AstAssign{
|
|
flp, writeCntRefp, new AstAdd{flp, readCntRefp, new AstConst{flp, 1}}};
|
|
AstAlways* const alwaysp
|
|
= new AstAlways{flp, VAlwaysKwd::ALWAYS,
|
|
new AstSenTree{flp, new AstSenItem{flp, VEdgeType::ET_POSEDGE,
|
|
m_disablep->cloneTree(false)}},
|
|
incrStmtp};
|
|
disableCntp->addNextHere(alwaysp);
|
|
|
|
// Store value of that counter at the beginning of sequence evaluation
|
|
AstBegin* const bodyp = nodep->bodyp();
|
|
AstVar* const initialCntp = new AstVar{flp, VVarType::BLOCKTEMP, "__VinitialCnt",
|
|
nodep->findBasicDType(VBasicDTypeKwd::UINT32)};
|
|
initialCntp->lifetime(VLifetime::AUTOMATIC_EXPLICIT);
|
|
bodyp->stmtsp()->addHereThisAsNext(initialCntp);
|
|
AstAssign* const assignp
|
|
= new AstAssign{flp, new AstVarRef{flp, initialCntp, VAccess::WRITE},
|
|
readCntRefp->cloneTree(false)};
|
|
initialCntp->addNextHere(assignp);
|
|
|
|
m_disableSeqIfp
|
|
= new AstIf{flp, new AstEq{flp, new AstVarRef{flp, initialCntp, VAccess::READ},
|
|
readCntRefp->cloneTree(false)}};
|
|
// Delete it, because it is always copied before insetion to the AST
|
|
pushDeletep(m_disableSeqIfp);
|
|
}
|
|
iterateChildren(nodep);
|
|
}
|
|
void visit(AstNodeModule* nodep) override {
|
|
VL_RESTORER(m_defaultClockingp);
|
|
VL_RESTORER(m_defaultClkEvtVarp);
|
|
VL_RESTORER(m_defaultDisablep);
|
|
VL_RESTORER(m_modp);
|
|
m_defaultClockingp = nullptr;
|
|
m_defaultClkEvtVarp = nullptr;
|
|
nodep->foreach([&](AstClocking* const clockingp) {
|
|
if (clockingp->isDefault()) {
|
|
if (m_defaultClockingp) {
|
|
clockingp->v3error("Only one default clocking block allowed per module"
|
|
" (IEEE 1800-2023 14.12)");
|
|
}
|
|
m_defaultClockingp = clockingp;
|
|
}
|
|
});
|
|
m_defaultDisablep = nullptr;
|
|
nodep->foreach([&](AstDefaultDisable* const disablep) {
|
|
if (m_defaultDisablep) {
|
|
disablep->v3error("Only one 'default disable iff' allowed per module"
|
|
" (IEEE 1800-2023 16.15)");
|
|
}
|
|
m_defaultDisablep = disablep;
|
|
});
|
|
m_modp = nodep;
|
|
// Pre-create and cache the clocking event var before iterating children.
|
|
// visit(AstClocking) will unlink the event from the clocking node and place it
|
|
// in the module tree, then delete the clocking. After that, ensureEventp() would
|
|
// create an orphaned var. Caching here avoids this.
|
|
m_defaultClkEvtVarp = m_defaultClockingp ? m_defaultClockingp->ensureEventp() : nullptr;
|
|
iterateChildren(nodep);
|
|
}
|
|
void visit(AstProperty* nodep) override {
|
|
// The body will be visited when will be substituted in place of property reference
|
|
// (AstFuncRef)
|
|
VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
|
|
}
|
|
void visit(AstSequence* nodep) override {
|
|
// Sequence declarations are not visited directly; their bodies are inlined
|
|
// at call sites by visit(AstFuncRef*). Collect for post-traversal cleanup.
|
|
m_seqsToCleanup.push_back(nodep);
|
|
}
|
|
void visit(AstNode* nodep) override { iterateChildren(nodep); }
|
|
|
|
public:
|
|
// CONSTRUCTORS
|
|
explicit AssertPreVisitor(AstNetlist* nodep)
|
|
: m_netlistp{nodep} {
|
|
// Process
|
|
iterate(nodep);
|
|
// Fix up varref names
|
|
for (AstVarXRef* xrefp : m_xrefsp) xrefp->name(xrefp->varp()->name());
|
|
// Clean up sequence declarations after inlining.
|
|
// Referenced sequences that were inlined have isReferenced cleared.
|
|
// Remaining referenced sequences are in unsupported contexts (e.g. @seq event).
|
|
for (AstSequence* seqp : m_seqsToCleanup) {
|
|
if (seqp->isReferenced()) {
|
|
seqp->v3warn(E_UNSUPPORTED,
|
|
"Unsupported: sequence referenced outside assertion property");
|
|
} else {
|
|
VL_DO_DANGLING(seqp->unlinkFrBack()->deleteTree(), seqp);
|
|
}
|
|
}
|
|
}
|
|
~AssertPreVisitor() override = default;
|
|
};
|
|
|
|
//######################################################################
|
|
// Top Assert class
|
|
|
|
void V3AssertPre::assertPreAll(AstNetlist* nodep) {
|
|
UINFO(2, __FUNCTION__ << ":");
|
|
{ AssertPreVisitor{nodep}; } // Destruct before checking
|
|
V3Global::dumpCheckGlobalTree("assertpre", 0, dumpTreeEitherLevel() >= 3);
|
|
}
|