24 lines
728 B
Python
Executable File
24 lines
728 B
Python
Executable File
#!/usr/bin/env python3
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# This program is free software; you can redistribute it and/or modify it
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# under the terms of either the GNU Lesser General Public License Version 3
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# or the Perl Artistic License Version 2.0.
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# SPDX-FileCopyrightText: 2024 Wilson Snyder
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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import vltest_bootstrap
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test.scenarios('simulator')
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test.compile(verilator_flags2=[
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'--trace-vcd', '-j 4', 't/t_hier_trace_sub/t_hier_trace.vlt', '--top-module t',
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'--hierarchical', '-F t/t_hier_trace_sub/top.vc'
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])
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test.execute(all_run_flags=['-j 4'])
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test.vcd_identical(test.trace_filename, test.golden_filename)
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test.passes()
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