101 lines
3.3 KiB
Systemverilog
101 lines
3.3 KiB
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain.
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// SPDX-FileCopyrightText: 2026 Matthew Ballance
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// SPDX-License-Identifier: CC0-1.0
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// Test ignore_bins - excluded from coverage
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// verilog_format: off
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`define stop $stop
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`define checkr(gotv,expv) do if ((gotv) != (expv)) begin $write("%%Error: %s:%0d: got=%f exp=%f\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0);
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// verilog_format: on
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module t;
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logic [3:0] data;
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logic [1:0] data2; // 2-bit signal for range-boundary tests
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covergroup cg;
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coverpoint data {
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bins low = {[0 : 3]};
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bins high = {[8 : 11]};
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ignore_bins reserved = {[12 : 15]};
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ignore_bins catch_all = default; // default ignore-bin: all values not in other bins are ignored
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ignore_bins arr[] = {4, 5}; // array form: one ignore-bin per value
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wildcard ignore_bins wib = {4'b1?00}; // wildcard ignore-bin with don't-care bits
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illegal_bins bad[] = {6, 7}; // illegal array form: one illegal-bin per value
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}
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endgroup
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// cg2: ignore_bins using a range - auto-bins are created only for values not in the range.
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// Also tests range-boundary conditions: when lo==0 or hi==maxVal, the range check simplifies.
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// Also tests ignore_bins with a transition list.
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covergroup cg2;
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cp_auto: coverpoint data2 {
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ignore_bins ign = {[2 : 3]}; // range ignore, no regular bins -> auto-bins created
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ignore_bins ign_trans = (0 => 1); // ignore the 0->1 transition
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}
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cp_auto_ub: coverpoint data2 {
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ignore_bins ub = {[2 : $]}; // open-ended ignore: '$' == domain max (3) -> auto-bins for 0,1
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}
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cp_bounds: coverpoint data2 {
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bins lo = {[0 : 1]}; // lower range (lo=0, no lower-bound check needed)
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bins hi = {[2 : 3]}; // upper range (hi=maxVal for 2-bit, no upper-bound check needed)
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}
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cp_full: coverpoint data2 {
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bins all = {[0 : 3]}; // full range (lo=0 and hi=maxVal: matches all values)
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}
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endgroup
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// cg3: open-ended LOWER bound ignore - '$' == domain min (0) -> auto-bins for 2,3
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covergroup cg3;
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cp_auto_lb: coverpoint data2 {
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ignore_bins lb = {[$ : 1]}; // ignore 0,1 -> auto-bins created for 2,3
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}
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endgroup
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cg cg_inst;
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cg2 cg2_inst;
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cg3 cg3_inst;
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initial begin
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cg_inst = new;
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cg2_inst = new;
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cg3_inst = new;
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data = 13;
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cg_inst.sample(); // reserved - ignored
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`checkr(cg_inst.get_inst_coverage(), 0.0);
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data = 1;
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cg_inst.sample(); // low
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`checkr(cg_inst.get_inst_coverage(), 50.0);
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data = 10;
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cg_inst.sample(); // high
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`checkr(cg_inst.get_inst_coverage(), 100.0);
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data2 = 0;
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cg2_inst.sample(); // auto_0, lo, all
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data2 = 1;
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cg2_inst.sample(); // auto_1, lo, all
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data2 = 2;
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cg2_inst.sample(); // ign, hi, all
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`checkr(cg2_inst.get_inst_coverage(), 100.0);
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data2 = 3;
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cg2_inst.sample(); // ign, hi, all
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`checkr(cg2_inst.get_inst_coverage(), 100.0);
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data2 = 0;
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cg3_inst.sample(); // lb (ignored)
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data2 = 2;
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cg3_inst.sample(); // auto_0
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`checkr(cg3_inst.get_inst_coverage(), 50.0);
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data2 = 3;
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cg3_inst.sample(); // auto_1
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`checkr(cg3_inst.get_inst_coverage(), 100.0);
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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