Version bump - commentary fix

Signed-off-by: Wilson Snyder <[email protected]>

Changes

@@ -3,7 +3,36 @@ Revision history for Verilator
 The contributors that suggested a given feature are shown in [].  [by ...]
 indicates the contributor was also the author of the fix; Thanks!
 
-* Verilator 3.873 2015-06-06
+* Verilator 3.876 2015-08-12
+
+***   Add tracing_on, etc to vlt files, bug932. [Frederic Requin]
+
+****  Support extraction of enum bits, bug951. [Jonathon Donaldson]
+
+****  Fix MinGW compiler error, bug927, bug929. [Hans Tichelaar]
+
+****  Fix .c files to be treated as .cpp, bug930. [Jonathon Donaldson]
+
+****  Fix string-to-int space conversion, bug931. [Fabrizio Ferrandi]
+
+****  Fix dpi imports inside generates. [Michael Tresidder]
+
+****  Fix rounding in trace $timescale, bug946. [Frederic Requin]
+
+****  Fix $fopen with SV string, bug947. [Sven Stucki]
+
+****  Fix hashed error with typedef inside block, bug948. [Sven Stucki]
+
+****  Fix makefile with --coverage, bug953. [Eivind Liland]
+
+****  Fix coverage documentation, bug954. [Thomas J Whatson]
+
+****  Fix parameters with function parameter arguments, bug952. [Jie Xu]
+
+****  Fix size casts as second argument of cast item, bug950. [Jonathon Donaldson]
+
+
+* Verilator 3.874 2015-06-06
 
 ***   Add pkg-config .pc file, bug919. [Stefan Wallentowitz]
 

bin/verilator

@@ -1923,30 +1923,40 @@ The grammar of configuration commands is as follows:
 Take remaining text up the the next `verilog mode switch and treat it as
 Verilator configuration commands.
 
+=item coverage_on  [-file "<filename>" [-lines <line> [ - <line> ]]]
+
 =item coverage_off [-file "<filename>" [-lines <line> [ - <line> ]]]
 
-Disable coverage for the specified filename (or wildcard with '*' or '?',
+Enable/disable coverage for the specified filename (or wildcard with '*' or
-or all files if omitted) and range of line numbers (or all lines if
+'?', or all files if omitted) and range of line numbers (or all lines if
 omitted).  Often used to ignore an entire module for coverage analysis
 purposes.
 
+=item lint_on  [-msg <message>] [-file "<filename>" [-lines <line> [ - <line>]]]
+
 =item lint_off [-msg <message>] [-file "<filename>" [-lines <line> [ - <line>]]]
 
-Disables the specified lint warning, in the specified filename (or wildcard
+Enable/disables the specified lint warning, in the specified filename (or
-with '*' or '?', or all files if omitted) and range of line numbers (or all
+wildcard with '*' or '?', or all files if omitted) and range of line
-lines if omitted).
+numbers (or all lines if omitted).
 
-Using '*' will override any lint_on directives in the source, i.e. the
+With lint_off using '*' will override any lint_on directives in the source,
-warning will still not be printed.
+i.e. the warning will still not be printed.
 
-If the -msg is omitted, all lint warnings are disabled.  This will override
+If the -msg is omitted, all lint warnings are enabled/disabled.  This will
-all later lint warning enables for the specified region.
+override all later lint warning enables for the specified region.
+
+=item tracing_on  [-file "<filename>" [-lines <line> [ - <line> ]]]
 
 =item tracing_off [-file "<filename>" [-lines <line> [ - <line> ]]]
 
-Disable waveform tracing for all future signals declared in the specified
+Enable/disable waveform tracing for all future signals declared in the
-filename (or wildcard with '*' or '?', or all files if omitted) and range
+specified filename (or wildcard with '*' or '?', or all files if omitted)
-of line numbers (or all lines if omitted).
+and range of line numbers (or all lines if omitted).
+
+For tracing_off, cells below any module in the files/ranges specified will
+also not be traced.
+
 
 =back
 
@@ -3563,7 +3573,10 @@ First, run verilator with the --coverage option.  If you're using your own
 makefile, compile the model with the GCC flag -DVM_COVERAGE (if using
 Verilator's, it will do this for you.)
 
-Run your tests in different directories.  Each test will create a
+At the end of your test, call VerilatedCov::write passing the name of the
+coverage data file (typically "logs/coverage.dat").
+
+Run each of your tests in different directories.  Each test will create a
 logs/coverage.pl file.
 
 After running all of your tests, verilator_coverage is executed.

configure.ac

@@ -6,7 +6,9 @@
 
 #AC_INIT([Verilator],[#.### YYYY-MM-DD])
 #AC_INIT([Verilator],[#.### devel])
-AC_INIT([Verilator],[3.874 2015-06-06])
+AC_INIT([Verilator],[3.876 2015-08-12])
+# When releasing, also update header of Changes file
+
 AC_CONFIG_HEADER(src/config_build.h)
 AC_CONFIG_FILES(Makefile src/Makefile src/Makefile_obj include/verilated.mk include/verilated_config.h verilator.pc)
 

include/verilated.cpp

@@ -708,8 +708,8 @@ void _VL_VINT_TO_STRING(int obits, char* destoutp, WDataInP sourcep) {
 	    start = false;	// Drop leading 0s
 	}
     }
-    *destp++ = '\0'; // Terminate
+    *destp = '\0'; // Terminate
-    while (isspace(*(destp-1)) && destp>destoutp) *--destp = '\0';  // Drop trailing spaces
+    if (!start) while (isspace(*(destp-1)) && destp>destoutp) *--destp = '\0';  // Drop trailing spaces
 }
 
 void _VL_STRING_TO_VINT(int obits, void* destp, int srclen, const char* srcp) {
@@ -750,6 +750,11 @@ IData VL_FGETS_IXI(int obits, void* destp, IData fpi) {
     return got;
 }
 
+IData VL_FOPEN_NI(const string& filename, IData mode) {
+    char modez[5];
+    _VL_VINT_TO_STRING(VL_WORDSIZE, modez, &mode);
+    return VL_FOPEN_S(filename.c_str(), modez);
+}
 IData VL_FOPEN_QI(QData filename, IData mode) {
     IData fnw[2];  VL_SET_WQ(fnw, filename);
     return VL_FOPEN_WI(2, fnw, mode);

include/verilated.h

@@ -357,6 +357,7 @@ extern IData VL_FOPEN_WI(int fnwords, WDataInP ofilename, IData mode);
 extern IData VL_FOPEN_QI(QData ofilename, IData mode);
 inline IData VL_FOPEN_II(IData ofilename, IData mode) { return VL_FOPEN_QI(ofilename,mode); }
 
+
 extern void VL_FCLOSE_I(IData fdi);
 
 extern void VL_READMEM_W(bool hex, int width, int depth, int array_lsb, int fnwords,

include/verilated.mk.in

@@ -120,10 +120,6 @@ ifeq ($(VM_SP),1)
 	 $(SP_PREPROC) -M sp_preproc.d --tree $(VM_PREFIX).sp_tree \
 		--preproc $(VK_CLASSES_SP)
 else
- ifeq ($(VM_COVERAGE),1)
-  CPPFLAGS += -I$(SYSTEMPERL_INCLUDE)
-  VPATH    +=   $(SYSTEMPERL_INCLUDE)
- endif
   preproc:
 endif
 

include/verilated_heavy.h

@@ -60,6 +60,7 @@ inline string VL_REPLICATEN_NNI(int obits,int lbits,int rbits, const string& lhs
     return VL_REPLICATEN_NNQ(obits,lbits,rbits,lhs,rep);
 }
 
+extern IData VL_FOPEN_NI(const string& filename, IData mode);
 extern IData VL_SSCANF_INX(int lbits, const string& ld, const char* formatp, ...);
 extern void VL_SFORMAT_X(int obits_ignored, string &output, const char* formatp, ...);
 extern string VL_SFORMATF_NX(const char* formatp, ...);

include/verilated_vcd_c.cpp

@@ -378,7 +378,7 @@ string VerilatedVcd::doubleToTimescale (double value) {
     else if (value>=1e-12) { suffixp="ps"; value *= 1e12; }
     else if (value>=1e-15) { suffixp="fs"; value *= 1e15; }
     else if (value>=1e-18) { suffixp="as"; value *= 1e18; }
-    char valuestr[100]; sprintf(valuestr,"%d%s",(int)(value), suffixp);
+    char valuestr[100]; sprintf(valuestr,"%3.0f%s", value, suffixp);
     return valuestr;  // Gets converted to string, so no ref to stack
 }
 

include/verilated_vpi.h

@@ -920,10 +920,10 @@ void vpi_get_value(vpiHandle object, p_vpi_value value_p) {
 	    value_p->value.str = outStr;
 	    switch (vop->varp()->vltype()) {
 	    // outStrSz does not include NULL termination so add one
-	    case VLVT_UINT8 : snprintf(outStr, outStrSz+1, "%hhu", (unsigned char )*((CData*)(vop->varDatap()))); return;
+	    case VLVT_UINT8 : VL_SNPRINTF(outStr, outStrSz+1, "%hhu", (unsigned char )*((CData*)(vop->varDatap()))); return;
-	    case VLVT_UINT16: snprintf(outStr, outStrSz+1, "%hu",  (unsigned short)*((SData*)(vop->varDatap()))); return;
+	    case VLVT_UINT16: VL_SNPRINTF(outStr, outStrSz+1, "%hu",  (unsigned short)*((SData*)(vop->varDatap()))); return;
-	    case VLVT_UINT32: snprintf(outStr, outStrSz+1, "%u",   (unsigned int  )*((IData*)(vop->varDatap()))); return;
+	    case VLVT_UINT32: VL_SNPRINTF(outStr, outStrSz+1, "%u",   (unsigned int  )*((IData*)(vop->varDatap()))); return;
-	    case VLVT_UINT64: snprintf(outStr, outStrSz+1, "%llu",  (unsigned long long)*((QData*)(vop->varDatap()))); return;
+	    case VLVT_UINT64: VL_SNPRINTF(outStr, outStrSz+1, "%llu",  (unsigned long long)*((QData*)(vop->varDatap()))); return;
 	    default:
                 strcpy(outStr, "-1");
 		_VL_VPI_ERROR(__FILE__, __LINE__, "%s: Unsupported format (%s) for %s, maximum limit is 64 bits",

include/verilatedos.h

@@ -207,19 +207,15 @@ typedef unsigned long long	vluint64_t;	///< 64-bit unsigned type
 # endif
 #endif
 
-#ifdef _WIN32
+#if defined(_WIN32) && defined(_MSC_VER)
-# define VL_VSNPRINTF vl_vsnprintf
+# if (_MSC_VER < 1900)
-inline int vl_vsnprintf(char* str, size_t size, const char* format, va_list ap) {
+#  define VL_SNPRINTF _snprintf
-    int count = -1;
+# else
-    if (size != 0) {
+#  define VL_SNPRINTF snprintf
-        count = _vsnprintf_s(str, size, _TRUNCATE, format, ap);
+# endif
-    }
+# define VL_VSNPRINTF vsnprintf
-    if (count == -1) {
-        count = _vscprintf(format, ap);
-    }
-    return count;
-}
 #else
+# define VL_SNPRINTF snprintf
 # define VL_VSNPRINTF vsnprintf
 #endif
 

src/V3Ast.h

@@ -239,6 +239,7 @@ public:
 	//
 	DT_PUBLIC,			// V3LinkParse moves to AstTypedef::attrPublic
 	//
+	ENUM_BASE,			// V3LinkResolve creates for AstPreSel, V3LinkParam removes
 	ENUM_FIRST,			// V3Width processes
 	ENUM_LAST,			// V3Width processes
 	ENUM_NUM,			// V3Width processes
@@ -268,7 +269,7 @@ public:
 	    "DIM_BITS", "DIM_DIMENSIONS", "DIM_HIGH", "DIM_INCREMENT", "DIM_LEFT",
 	    "DIM_LOW", "DIM_RIGHT", "DIM_SIZE", "DIM_UNPK_DIMENSIONS",
 	    "DT_PUBLIC",
-	    "ENUM_FIRST", "ENUM_LAST", "ENUM_NUM", "ENUM_NEXT", "ENUM_PREV", "ENUM_NAME",
+	    "ENUM_BASE", "ENUM_FIRST", "ENUM_LAST", "ENUM_NUM", "ENUM_NEXT", "ENUM_PREV", "ENUM_NAME",
 	    "MEMBER_BASE",
 	    "VAR_BASE", "VAR_CLOCK", "VAR_CLOCK_ENABLE", "VAR_PUBLIC",
 	    "VAR_PUBLIC_FLAT", "VAR_PUBLIC_FLAT_RD","VAR_PUBLIC_FLAT_RW",

src/V3AstNodes.cpp

@@ -506,9 +506,9 @@ string AstScope::nameDotless() const {
     return out;
 }
 
-string AstScopeName::scopePrettyName() const {
+string AstScopeName::scopePrettyNameFormatter(AstText* scopeTextp) const {
     string out;
-    for (AstText* textp=scopeAttrp(); textp; textp=textp->nextp()->castText()) {
+    for (AstText* textp=scopeTextp; textp; textp=textp->nextp()->castText()) {
 	out += textp->text();
     }
     // TOP will be replaced by top->name()
@@ -518,27 +518,9 @@ string AstScopeName::scopePrettyName() const {
     return AstNode::prettyName(out);
 }
 
-string AstScopeName::scopeSymName() const {
+string AstScopeName::scopeNameFormatter(AstText* scopeTextp) const {
     string out;
-    for (AstText* textp=scopeAttrp(); textp; textp=textp->nextp()->castText()) {
+    for (AstText* textp=scopeTextp; textp; textp=textp->nextp()->castText()) {
-	out += textp->text();
-    }
-    if (out.substr(0,10) == "__DOT__TOP") out.replace(0,10,"");
-    if (out.substr(0,7) == "__DOT__") out.replace(0,7,"");
-    if (out.substr(0,1) == ".") out.replace(0,1,"");
-    string::size_type pos;
-    while ((pos=out.find(".")) != string::npos) {
-	out.replace(pos, 1, "__");
-    }
-    while ((pos=out.find("__DOT__")) != string::npos) {
-	out.replace(pos, 7, "__");
-    }
-    return out;
-}
-
-string AstScopeName::scopeDpiName() const {
-    string out;
-    for (AstText* textp=scopeEntrp(); textp; textp=textp->nextp()->castText()) {
 	out += textp->text();
     }
     if (out.substr(0,10) == "__DOT__TOP") out.replace(0,10,"");

src/V3AstNodes.h

@@ -3067,6 +3067,8 @@ class AstScopeName : public AstNodeMath {
     // Children: TEXT
 private:
     bool	m_dpiExport;	// Is for dpiExport
+    string scopeNameFormatter(AstText* textp) const;
+    string scopePrettyNameFormatter(AstText* textp) const;
 public:
     AstScopeName(FileLine* fl) : AstNodeMath(fl), m_dpiExport(false) {
 	dtypeSetUInt64(); }
@@ -3080,9 +3082,10 @@ public:
     void 	scopeAttrp(AstNode* nodep) { addOp1p(nodep); }
     AstText*	scopeEntrp() const { return op2p()->castText(); }
     void 	scopeEntrp(AstNode* nodep) { addOp2p(nodep); }
-    string scopeSymName() const;  // Name for __Vscope variable including children
+    string scopeSymName() const { return scopeNameFormatter(scopeAttrp()); }  // Name for __Vscope variable including children
-    string scopeDpiName() const;  // Name for DPI import scope
+    string scopeDpiName() const { return scopeNameFormatter(scopeEntrp()); }  // Name for DPI import scope
-    string scopePrettyName() const;  // Name for __Vscope printing
+    string scopePrettySymName() const { return scopePrettyNameFormatter(scopeAttrp()); }  // Name for __Vscope variable including children
+    string scopePrettyDpiName() const { return scopePrettyNameFormatter(scopeEntrp()); }  // Name for __Vscope variable including children
     bool dpiExport() const { return m_dpiExport; }
     void dpiExport(bool flag) { m_dpiExport=flag; }
 };
@@ -3511,6 +3514,7 @@ public:
 	setOp1p(lhsp); setOp2p(rhsp);
     }
     ASTNODE_NODE_FUNCS(CastSize, CASTSIZE)
+    // No hasDType because widthing removes this node before the hasDType check
     virtual string emitVerilog() { return "((%r)'(%l))"; }
     virtual string emitC() { V3ERROR_NA; return ""; }
     virtual bool cleanOut() { V3ERROR_NA; return true;} virtual bool cleanLhs() {return true;}

src/V3Config.cpp

@@ -144,12 +144,12 @@ V3ConfigIgnores V3ConfigIgnores::s_singleton;
 //######################################################################
 // V3Config
 
-void V3Config::addIgnore(V3ErrorCode code, string filename, int min, int max) {
+void V3Config::addIgnore(V3ErrorCode code, bool on, string filename, int min, int max) {
     if (filename=="*") {
-	FileLine::globalWarnOff(code,true);
+	FileLine::globalWarnOff(code,!on);
     } else {
-	V3ConfigIgnores::singleton().addIgnore(code, filename, min, false);
+	V3ConfigIgnores::singleton().addIgnore(code, filename, min, on);
-	if (max) V3ConfigIgnores::singleton().addIgnore(code, filename, max, true);
+	if (max) V3ConfigIgnores::singleton().addIgnore(code, filename, max, !on);
     }
 }
 

src/V3Config.h

@@ -30,7 +30,7 @@
 
 class V3Config {
 public:
-    static void addIgnore(V3ErrorCode code, string filename, int min, int max);
+    static void addIgnore(V3ErrorCode code, bool on, string filename, int min, int max);
     static void applyIgnores(FileLine* filelinep);
 };
 

src/V3EmitC.cpp

@@ -1351,7 +1351,7 @@ void EmitCStmts::displayNode(AstNode* nodep, AstScopeName* scopenamep,
 	    case 'g': displayArg(nodep,&elistp,isScan, vfmt,'g'); break;
 	    case 'm': {
 		if (!scopenamep) nodep->v3fatalSrc("Display with %m but no AstScopeName");
-		string suffix = scopenamep->scopePrettyName();
+		string suffix = scopenamep->scopePrettySymName();
 		if (suffix=="") emitDispState.pushFormat("%S");
 		else emitDispState.pushFormat("%N");  // Add a . when needed
 		emitDispState.pushArg(' ',NULL, "vlSymsp->name()");
@@ -1563,12 +1563,12 @@ void EmitCImp::emitSavableImp(AstNodeModule* modp) {
 	    VHashFnv hash;
 	    for (AstNode* nodep=modp->stmtsp(); nodep; nodep = nodep->nextp()) {
 		if (AstVar* varp = nodep->castVar()) {
-		    hash.hash(varp->name());
+		    hash.insert(varp->name());
-		    hash.hash(varp->dtypep()->width());
+		    hash.insert(varp->dtypep()->width());
 		}
 	    }
 	    ofp()->printf(   "vluint64_t __Vcheckval = VL_ULL(0x%" VL_PRI64 "x);\n",
-			     hash.value());
+			     hash.digestUInt64());
 	    if (de) {
 		puts("os.readAssert(__Vcheckval);\n");
 	    } else {

src/V3EmitCSyms.cpp

@@ -193,14 +193,18 @@ class EmitCSyms : EmitCBaseVisitor {
     }
     virtual void visit(AstScopeName* nodep, AstNUser*) {
 	string name = nodep->scopeSymName();
-	//UINFO(9,"scnameins sp "<<nodep->name()<<" sp "<<nodep->scopePrettyName()<<" ss "<<name<<endl);
+	//UINFO(9,"scnameins sp "<<nodep->name()<<" sp "<<nodep->scopePrettySymName()<<" ss "<<name<<endl);
 	if (m_scopeNames.find(name) == m_scopeNames.end()) {
-	    m_scopeNames.insert(make_pair(name, ScopeNameData(name, nodep->scopePrettyName())));
+	    m_scopeNames.insert(make_pair(name, ScopeNameData(name, nodep->scopePrettySymName())));
 	}
 	if (nodep->dpiExport()) {
 	    if (!m_funcp) nodep->v3fatalSrc("ScopeName not under DPI function");
 	    m_scopeFuncs.insert(make_pair(name + " " + m_funcp->name(),
 					  ScopeFuncData(nodep, m_funcp, m_modp)));
+	} else {
+	    if (m_scopeNames.find(nodep->scopeDpiName()) == m_scopeNames.end()) {
+		m_scopeNames.insert(make_pair(nodep->scopeDpiName(), ScopeNameData(nodep->scopeDpiName(), nodep->scopePrettyDpiName())));
+	    }
 	}
     }
     virtual void visit(AstVar* nodep, AstNUser*) {

src/V3Hashed.cpp

@@ -89,6 +89,7 @@ private:
     //--------------------
     // Default: Just iterate
     virtual void visit(AstVar*, AstNUser*) {}
+    virtual void visit(AstTypedef*, AstNUser*) {}
     virtual void visit(AstNode* nodep, AstNUser*) {
 	nodeHashIterate(nodep);
     }

src/V3LinkResolve.cpp

@@ -207,7 +207,11 @@ private:
 	    } else if (AstMemberSel* fromp = basefromp->castMemberSel()) {
 		nodep->attrp(new AstAttrOf(nodep->fileline(), AstAttrType::MEMBER_BASE,
 					   fromp->cloneTree(false)));
+	    } else if (AstEnumItemRef* fromp = basefromp->castEnumItemRef()) {
+		nodep->attrp(new AstAttrOf(nodep->fileline(), AstAttrType::ENUM_BASE,
+					   fromp->cloneTree(false)));
 	    } else {
+		if (basefromp) { UINFO(1,"    Related node: "<<basefromp<<endl); }
 		nodep->v3fatalSrc("Illegal bit select; no signal/member being extracted from");
 	    }
 	}

src/V3Options.cpp

@@ -960,6 +960,7 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc, char
 	    if (suffixed(filename.c_str(), ".cpp")
 		|| suffixed(filename.c_str(), ".cxx")
 		|| suffixed(filename.c_str(), ".cc")
+		|| suffixed(filename.c_str(), ".c")
 		|| suffixed(filename.c_str(), ".sp")) {
 		V3Options::addCppFile(filename);
 	    }

src/V3Os.cpp

@@ -55,7 +55,7 @@ void V3Os::setenvStr(const string& envvar, const string& value, const string& wh
     } else {
 	UINFO(1,"export "<<envvar<<"="<<value<<endl);
     }
-#if defined(_BSD_SOURCE) || (defined(_POSIX_C_SOURCE) && _POSIX_C_SOURCE >= 200112L)
+#if !defined(__MINGW32__) && (defined(_BSD_SOURCE) || (defined(_POSIX_C_SOURCE) && _POSIX_C_SOURCE >= 200112L))
     setenv(envvar.c_str(),value.c_str(),true);
 #else
     //setenv() replaced by putenv() in MinGW/Solaris environment. Prototype is different

src/V3Simulate.h

@@ -260,7 +260,9 @@ private:
 	// We can't have non-delayed assignments with same value on LHS and RHS
 	// as we don't figure out variable ordering.
 	// Delayed is OK though, as we'll decode the next state separately.
-	if (!nodep->varp()->dtypeSkipRefp()->castBasicDType()) clearOptimizable(nodep,"Array references/not basic");
+	if (!nodep->varp()->dtypeSkipRefp()->castBasicDType()
+            && !nodep->varp()->dtypeSkipRefp()->castPackArrayDType())
+            clearOptimizable(nodep,"Array references/not basic");
 	if (nodep->lvalue()) {
 	    if (m_inDlyAssign) {
 		if (!(vscp->user1() & VU_LVDLY)) {
@@ -450,7 +452,7 @@ private:
 	    if (!m_params) { clearOptimizable(nodep, "LHS has select"); return; }
 	    checkNodeInfo(selp);
 	    AstVarRef* varrefp = selp->fromp()->castVarRef();
-	    if (!varrefp) { 
+	    if (!varrefp) {
 		clearOptimizable(nodep, "Select LHS isn't simple variable");
 		return;
 	    }

src/V3String.h

@@ -55,35 +55,35 @@ public:
     VHashFnv() : m_hash(FNV1_64_INIT) {}
     ~VHashFnv() {}
 
-    vluint64_t value() const { return m_hash; }
+    vluint64_t digestUInt64() const { return m_hash; }
 
-    VHashFnv& hash(const void* bufp, size_t len) {  // Memory
+    VHashFnv& insert(const void* bufp, size_t len) {  // Memory
 	const uint8_t* bp = (const uint8_t*)bufp;
 	const uint8_t* be = bp + len;
 	while (bp < be) hashC((vluint64_t)*bp++);
 	return *this;
     }
-    VHashFnv& hash(const char* strp) {  // String
+    VHashFnv& insert(const char* strp) {  // String
 	const uint8_t* sp = (const uint8_t*)strp;
 	while (*sp) hashC((vluint64_t)*sp++);
 	return *this;
     }
-    VHashFnv& hash(const string& str) { return hash(str.c_str()); }
+    VHashFnv& insert(const string& str) { return insert(str.data(), str.length()); }
-    VHashFnv& hash(vluint64_t n) {
+    VHashFnv& insert(vluint64_t n) {
 	hashC(n>>0); hashC(n>>8); hashC(n>>16); hashC(n>>24);
 	hashC(n>>32); hashC(n>>40); hashC(n>>48); hashC(n>>56);
 	return *this;
     }
-    VHashFnv& hash(uint32_t n) {
+    VHashFnv& insert(uint32_t n) {
 	hashC(n>>0); hashC(n>>8); hashC(n>>16); hashC(n>>24);
 	return *this;
     }
-    VHashFnv& hash(uint16_t n) {
+    VHashFnv& insert(uint16_t n) {
 	hashC(n>>0); hashC(n>>8);
 	return *this;
     }
-    VHashFnv& hash(uint8_t n) { hashC(n); return *this; }
+    VHashFnv& insert(uint8_t n) { hashC(n); return *this; }
-    VHashFnv& hash(int n) { hashC((vluint64_t)n); return *this; }
+    VHashFnv& insert(int n) { hashC((vluint64_t)n); return *this; }
 };
 
 //######################################################################

src/V3Width.cpp

@@ -834,9 +834,8 @@ private:
 	// Don't iterate children, don't want to lose VarRef.
 	switch (nodep->attrType()) {
 	case AstAttrType::VAR_BASE:
-	    // Soon to be handled in V3LinkWidth SEL generation, under attrp() and newSubLsbOf
-	    break;
 	case AstAttrType::MEMBER_BASE:
+	case AstAttrType::ENUM_BASE:
 	    // Soon to be handled in V3LinkWidth SEL generation, under attrp() and newSubLsbOf
 	    break;
 	case AstAttrType::DIM_DIMENSIONS:
@@ -1825,7 +1824,8 @@ private:
 	// Apply width
         iterateCheck(nodep,"Case expression",nodep->exprp(),CONTEXT,FINAL,subDTypep,EXTEND_LHS);
 	for (AstCaseItem* itemp = nodep->itemsp(); itemp; itemp=itemp->nextp()->castCaseItem()) {
-	    for (AstNode* condp = itemp->condsp(); condp; condp=condp->nextp()) {
+	    for (AstNode* nextcp, *condp = itemp->condsp(); condp; condp=nextcp) {
+		nextcp = condp->nextp(); // Final may cause the node to get replaced
 		iterateCheck(nodep,"Case Item",condp,CONTEXT,FINAL,subDTypep,EXTEND_LHS);
 	    }
 	}

src/verilog.l

@@ -167,8 +167,11 @@ vnum	{vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5}
   {crnl}		{ NEXTLINE(); }		/* Count line numbers */
 
   "coverage_off"	{ FL; return yVLT_COVERAGE_OFF; }
+  "coverage_on"		{ FL; return yVLT_COVERAGE_ON; }
   "lint_off"		{ FL; return yVLT_LINT_OFF; }
+  "lint_on"		{ FL; return yVLT_LINT_ON; }
   "tracing_off"		{ FL; return yVLT_TRACING_OFF; }
+  "tracing_on"		{ FL; return yVLT_TRACING_ON; }
 
   -?"-file"		{ FL; return yVLT_D_FILE; }
   -?"-lines"		{ FL; return yVLT_D_LINES; }

src/verilog.y

@@ -243,8 +243,11 @@ class AstSenTree;
 %token<strp>		yaSCDTOR	"`systemc_imp_header BLOCK"
 
 %token<fl>		yVLT_COVERAGE_OFF "coverage_off"
-%token<fl>		yVLT_LINT_OFF	"lint_off"
+%token<fl>		yVLT_COVERAGE_ON  "coverage_on"
-%token<fl>		yVLT_TRACING_OFF "tracing_off"
+%token<fl>		yVLT_LINT_OFF	  "lint_off"
+%token<fl>		yVLT_LINT_ON	  "lint_on"
+%token<fl>		yVLT_TRACING_OFF  "tracing_off"
+%token<fl>		yVLT_TRACING_ON   "tracing_on"
 
 %token<fl>		yVLT_D_FILE	"--file"
 %token<fl>		yVLT_D_LINES	"--lines"
@@ -3625,10 +3628,14 @@ package_scopeIdFollows<packagep>:	// IEEE: package_scope
 // VLT Files
 
 vltItem:
-		vltOffFront				{ V3Config::addIgnore($1,"*",0,0); }
+		vltOffFront				{ V3Config::addIgnore($1,false,"*",0,0); }
-	|	vltOffFront yVLT_D_FILE yaSTRING	{ V3Config::addIgnore($1,*$3,0,0); }
+	|	vltOffFront yVLT_D_FILE yaSTRING	{ V3Config::addIgnore($1,false,*$3,0,0); }
-	|	vltOffFront yVLT_D_FILE yaSTRING yVLT_D_LINES yaINTNUM			{ V3Config::addIgnore($1,*$3,$5->toUInt(),$5->toUInt()+1); }
+	|	vltOffFront yVLT_D_FILE yaSTRING yVLT_D_LINES yaINTNUM			{ V3Config::addIgnore($1,false,*$3,$5->toUInt(),$5->toUInt()+1); }
-	|	vltOffFront yVLT_D_FILE yaSTRING yVLT_D_LINES yaINTNUM '-' yaINTNUM	{ V3Config::addIgnore($1,*$3,$5->toUInt(),$7->toUInt()+1); }
+	|	vltOffFront yVLT_D_FILE yaSTRING yVLT_D_LINES yaINTNUM '-' yaINTNUM	{ V3Config::addIgnore($1,false,*$3,$5->toUInt(),$7->toUInt()+1); }
+	|	vltOnFront				{ V3Config::addIgnore($1,true,"*",0,0); }
+	|	vltOnFront yVLT_D_FILE yaSTRING		{ V3Config::addIgnore($1,true,*$3,0,0); }
+	|	vltOnFront yVLT_D_FILE yaSTRING yVLT_D_LINES yaINTNUM			{ V3Config::addIgnore($1,true,*$3,$5->toUInt(),$5->toUInt()+1); }
+	|	vltOnFront yVLT_D_FILE yaSTRING yVLT_D_LINES yaINTNUM '-' yaINTNUM	{ V3Config::addIgnore($1,true,*$3,$5->toUInt(),$7->toUInt()+1); }
 	;
 
 vltOffFront<errcodeen>:
@@ -3640,6 +3647,15 @@ vltOffFront<errcodeen>:
 			  if ($$ == V3ErrorCode::EC_ERROR) { $1->v3error("Unknown Error Code: "<<*$3<<endl);  } }
 	;
 
+vltOnFront<errcodeen>:
+		yVLT_COVERAGE_ON			{ $$ = V3ErrorCode::I_COVERAGE; }
+	|	yVLT_TRACING_ON				{ $$ = V3ErrorCode::I_TRACING; }
+	|	yVLT_LINT_ON				{ $$ = V3ErrorCode::I_LINT; }
+	|	yVLT_LINT_ON yVLT_D_MSG yaID__ETC
+			{ $$ = V3ErrorCode((*$3).c_str());
+			  if ($$ == V3ErrorCode::EC_ERROR) { $1->v3error("Unknown Error Code: "<<*$3<<endl);  } }
+	;
+
 //**********************************************************************
 %%
 

test_regress/t/TestSimulator.h

@@ -14,6 +14,7 @@
 //*************************************************************************
 
 #include "vpi_user.h"
+#include <sstream>
 
 class TestSimulator {
 private:
@@ -69,9 +70,11 @@ public:
     }
     // return absolute scope of obj
     static const char* rooted(const char *obj) {
-	static char buf[256];
+	static string buf;
-	snprintf(buf, sizeof(buf), "%s.%s", top(), obj);
+	ostringstream os;
-	return buf;
+	os<<top()<<"."<<obj;
+	buf = os.str();
+	return buf.c_str();
     }
 };
 

test_regress/t/t_bitsel_enum.pl

@@ -0,0 +1,18 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+
+compile (
+    );
+
+execute (
+    check_finished=>1,
+    );
+
+ok(1);
+1;

test_regress/t/t_bitsel_enum.v

@@ -0,0 +1,27 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2015 by Jonathon Donaldson.
+
+module t_bitsel_enum
+  (
+   output out0,
+   output out1
+   );
+
+   localparam [6:0] CNST_VAL = 7'h22;
+
+   enum   logic [6:0] {
+		       ENUM_VAL = 7'h33
+		       } MyEnum;
+
+   assign out0 = CNST_VAL[0];
+   // This is not supported by NC-verilog nor VCS, so Verilator does not support it either
+   assign out1 = ENUM_VAL[0]; // named values of an enumeration should act like constants so this should work just like the line above works
+
+   initial begin
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule

test_regress/t/t_case_group.pl

@@ -0,0 +1,18 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+
+compile (
+    );
+
+execute (
+    check_finished=>1,
+    );
+
+ok(1);
+1;

test_regress/t/t_case_group.v

@@ -0,0 +1,25 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2014 by Jonathon Donaldson.
+
+module t
+  (
+   input 	i_clk,
+   input [6:0] 	i_input,
+   output logic o_output
+   );
+
+   always_ff @(posedge i_clk)
+     // verilator lint_off CASEINCOMPLETE
+     case (i_input)
+       7'(92+2),
+       7'(92+3): o_output <= 1'b1;
+     endcase
+
+   initial begin
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule

test_regress/t/t_dist_portability.pl

@@ -88,14 +88,15 @@ sub cstr {
 }
 
 sub vsnprintf {
-    my $files = "src/*.c* src/*.h include/*.c* include/*.h test_c/*.c* test_regress/t/*.c* test_regress/t/*.h";
+    # Note do not do test_regress, as VPI files need to compile without verilatedos.h
-    my $cmd = "cd $root && grep -n -P 'vsnprintf' $files | sort";
+    my $files = "src/*.c* src/*.h include/*.c* include/*.h test_c/*.c*";
+    my $cmd = "cd $root && grep -n -P '(snprintf|vsnprintf)' $files | sort";
     print "C $cmd\n";
     my $grep = `$cmd`;
     my %names;
     foreach my $line (split /\n/, $grep) {
-	if ($line =~ /\b(vsnprintf)\b/) {
+	if ($line =~ /\b(snprintf|vsnprintf)\b/) {
-	    next if $line =~ /# *define\s*VL_VSNPRINTF/;
+	    next if $line =~ /# *define\s*VL_V?SNPRINTF/;
 	    print "$line\n";
 	    $names{$1} = 1;
 	}

test_regress/t/t_dpi_imp_gen.pl

@@ -0,0 +1,19 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2011 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+
+compile (
+    v_flags2 => ["t/t_dpi_imp_gen_c.cpp"],
+    );
+
+execute (
+    check_finished=>1,
+    );
+
+ok(1);
+1;

test_regress/t/t_dpi_imp_gen.v

@@ -0,0 +1,33 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// Copyright 2009 by Wilson Snyder. This program is free software; you can
+// redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+
+module t (/*AUTOARG*/
+   // Inputs
+   clk
+   );
+   input clk;
+
+   parameter integer BLKS = 3;
+
+   generate
+      for (genvar blkIdx=0; blkIdx < BLKS; blkIdx=blkIdx+1 ) begin : slice
+
+	 import "DPI-C" context function void dpi_genvarTest ();
+
+         initial begin
+	    dpi_genvarTest();
+	    $display("slice = %0d   :  %m", blkIdx);
+	 end
+     end
+   endgenerate
+
+   always @ (posedge clk) begin
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+   
+endmodule

test_regress/t/t_dpi_imp_gen_c.cpp

@@ -0,0 +1,39 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
+//
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// Copyright 2009 by Wilson Snyder. This program is free software; you can
+// redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+//*************************************************************************
+
+#include <cstdio>
+#include <cstring>
+#include "svdpi.h"
+
+//======================================================================
+
+#if defined(VERILATOR)
+# include "Vt_dpi_imp_gen__Dpi.h"
+#elif defined(VCS)
+# include "../vc_hdrs.h"
+#elif defined(CADENCE)
+# define NEED_EXTERNS
+#else
+# error "Unknown simulator for DPI test"
+#endif
+
+#ifdef NEED_EXTERNS
+extern "C" {
+    extern void dpi_genvarTest();
+}
+#endif
+
+//======================================================================
+
+// Called from our Verilog code to run the tests
+void dpi_genvarTest () {
+    const char *scopeName = svGetNameFromScope(svGetScope());
+    printf("scope name : %s\n", scopeName);
+}

test_regress/t/t_param_func.pl

@@ -0,0 +1,14 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+
+compile (
+    );
+
+ok(1);
+1;

test_regress/t/t_param_func.v

@@ -0,0 +1,34 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This test examines Verilator against paramter definition with functions.
+// Particularly the function takes in argument which is multi-dimentional.
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2015 by Roland Kruse and Jie Xu.
+
+module test#(
+    parameter size = 4,
+    parameter p = sum({32'h1,32'h2,32'h3,32'h4}, size))
+
+    (input clk,
+     input logic sel,
+     output [p:0] res);
+
+    logic [p:0] cc = 'h45;
+
+    assign res = sel ? cc : {(p+1){1'b1}};
+
+    function integer sum;
+        input [3:0][31:0] values;
+        input int size;
+
+        sum = 0;
+
+        begin
+            for (int i = 0; i < size; i ++)
+                sum += values[i];
+        end
+    endfunction
+
+endmodule
+

test_regress/t/t_sys_file_basic.v

@@ -66,6 +66,14 @@ module t;
 	 $fclose(file);
       end
 
+      begin
+	 // Check read functions w/string
+	 s = "t/t_sys_file_basic_input.dat";
+	 file = $fopen(s,"r");
+	 if ($feof(file)) $stop;
+	 $fclose(file);
+      end
+
       begin
 	 // Check read functions
 	 file = $fopen("t/t_sys_file_basic_input.dat","r");

test_regress/t/t_trace_cat.cpp

@@ -26,11 +26,11 @@ double sc_time_stamp() {
 const char* trace_name() {
     static char name[1000];
 #if defined(T_TRACE_CAT)
-    snprintf(name,1000,"obj_dir/t_trace_cat/simpart_%04d.vcd", (int)main_time);
+    VL_SNPRINTF(name,1000,"obj_dir/t_trace_cat/simpart_%04d.vcd", (int)main_time);
 #elif defined(T_TRACE_CAT_REOPEN)
-    snprintf(name,1000,"obj_dir/t_trace_cat_reopen/simpart_%04d.vcd", (int)main_time);
+    VL_SNPRINTF(name,1000,"obj_dir/t_trace_cat_reopen/simpart_%04d.vcd", (int)main_time);
 #elif defined(T_TRACE_CAT_RENEW)
-    snprintf(name,1000,"obj_dir/t_trace_cat_renew/simpart_%04d.vcd", (int)main_time);
+    VL_SNPRINTF(name,1000,"obj_dir/t_trace_cat_renew/simpart_%04d.vcd", (int)main_time);
 #else
 # error "Unknown test"
 #endif

test_regress/t/t_typedef.v

@@ -25,6 +25,13 @@ program t;
 //reg [SIZE-1:0] a; initial a =0;
 //reg [SIZE-1:0] b; initial b =0;
 
+   initial begin
+      typedef logic [3:0][7:0] instr_mem_t;
+      instr_mem_t a;
+      a[0] = 8'h12;
+      if (a[0] != 8'h12) $stop;
+   end
+
    integer j;
    initial begin
       for (j=0;j<=(1<<SIZE);j=j+1) begin

test_sc/sc_main.cpp

@@ -140,8 +140,8 @@ int sc_main(int argc, char* argv[]) {
     //  Coverage analysis (since test passed)
     mkdir("logs", 0777);
 #if VM_COVERAGE
-    SpCoverage::write();  // Writes logs/coverage.pl
+    VerilatedCov::write("logs/coverage.dat");
-#endif
+#endif // VM_COVERAGE
 
     //==========
     //  Close LogFiles