George Polack
f1826a7c20
Support Verilog real to SystemC double ( #6136 ) ( #6158 )
2025-07-25 20:05:36 +02:00
Wilson Snyder
fa62cd3486
Fix `--stats` overridden by skipping identical build ( #6220 ).
2025-07-25 07:23:02 -04:00
Yilou Wang
10ac99ac05
Support randomization of scope variables with 'std::randomize()' ( #5438 ) ( #6185 )
2025-07-25 12:13:46 +02:00
Wilson Snyder
b408e097f6
Fix unsigned replicate ( #6229 )
2025-07-24 22:55:26 -04:00
Geza Lore
94bebb2bcb
Fix dereferencing stale iterator in DfgVertex::scopep() ( #6227 )
...
Fix dereferencing stale iterator in DfgVertex::scopep()
Fixes part of #6225
2025-07-24 15:31:31 +01:00
Geza Lore
2be257369a
Fix component numbers of new Vertices in V3DfgBreakCycles ( #6228 )
...
Fix component numbers of new Vertices in V3DfgBreakCycles
Fixes part of #6225
2025-07-24 15:31:09 +01:00
Artur Bieniek
04c38d5b3b
Tests: Switch to measuring CPU time instead of real time in test timeouts ( #6224 )
...
Signed-off-by: Artur Bieniek <abieniek@internships.antmicro.com>
2025-07-24 11:27:02 +02:00
Wilson Snyder
4882a3c827
Commentary: Changes update
2025-07-24 02:44:54 -04:00
Wilson Snyder
e995646898
Internals: Favor std::array. No functional change intended.
2025-07-24 02:39:03 -04:00
Wilson Snyder
2287d420ee
Optimize to return memory when using -build ( #6192 ) ( #6226 ).
2025-07-24 08:36:58 +02:00
Wilson Snyder
db5b2669fc
Add current memory usage statistic ( #6192 partial)
2025-07-24 08:36:58 +02:00
Wilson Snyder
460bfbf181
Fix replicate of negative giving 'REPLICATE has no expected width' internal error ( #6048 ).
2025-07-23 18:07:50 -04:00
Wilson Snyder
050e5ddb5b
Fix internal error after bad method
2025-07-23 17:17:35 -04:00
Wilson Snyder
393f0e4acb
Tests: Example format
2025-07-23 14:58:58 -04:00
Geza Lore
7c5d462564
Remove AstJumpLabel ( #6221 )
...
Remove AstJumpLabel
AstJumpGo now references one if its enclosing AstJumpBlocks, and
branches straight after the referenced block.
That is:
```
JumpBlock a {
...
JumpGo(a);
...
}
// <--- the JumpGo(a) goes here
```
This is sufficient for all use cases and makes control flow much easier to
reason about. As a result, V3Const can optimize a bit more aggressively.
Second half of, and fixes #6216
2025-07-23 17:51:16 +01:00
Geza Lore
763183f067
Internals: Remove AstWhile::precondsp() ( #6219 ). No functional change intended.
2025-07-23 08:50:39 -04:00
Geza Lore
2958a5aaae
Internals: Do not emit temporaries for atomic assignments. ( #6217 )
...
Added test for a particularly convoluted case requiring fixup in
V3Premit. To help with statistics stability, also prevent V3Premit from
introducing temporaries for assignment where the RHS reads the LHS, but
the assignment is known to be atomic (by emitted C++ semantics).
Also rename `createWideTemp` to `createTemp`, as it is used for non-wide
expressions as well.
2025-07-23 11:48:55 +02:00
Geza Lore
344fabf56a
Fix incorrect assumption in V3DfgDecomposition ( #6215 )
...
Due to SCC merging the deleted assumption/assertion can be violated.
Fixes #6211 .
2025-07-22 14:03:35 +01:00
Geza Lore
9f04ee68c8
Optimize combinational cycles through arrays in DFG ( #6210 )
...
Extending V3DfgBreakCycles to handle common cases involving unpacked
arrays.
2025-07-22 08:23:45 +01:00
github action
b5126a6abe
Apply 'make format'
2025-07-21 23:29:42 +00:00
Danny Oler
74d4b0c0ea
Fix automatic task variables in unrolled loops with forks ( #6194 ) ( #6201 ).
2025-07-21 19:28:50 -04:00
Geza Lore
7401a8a43a
Refactor DFG IndependentBits analysis to work for any vertex. ( #6209 )
...
This used to be restricted to variable vertices, but now can handle
arbitrary circular vertices that represent packed values. It also
converges faster than the earlier version. Prep for resolving loops
through arrays.
2025-07-21 19:57:02 +01:00
Geza Lore
7646e7d89c
Exclude SystemC variables from DFG ( #6208 )
...
SystemC variables are fairly special (they can only be assigned to/from,
but not otherwise participate in expressions), which complicates some
DFG code. These variables only ever appear as port on the top level
wrapper, so excluding them from DFG does not make us loose any
optimizations, but simplifies internals.
2025-07-21 18:32:08 +01:00
Geza Lore
a8dca71ed0
Support more complex combinational assignments in DFG. ( #6205 )
...
Previously DFG was limited to having a Sel, or an ArraySel potentially
under a Concat on the LHS of combinational assignments. Other forms or
combinations were not representable in the graph.
This adds support for arbitrary combinations of the above by
combining DfgSplicePacked and DfgSpliceArray vertices introduced in
#6176 . In particular, Sel(ArraySel(VarRef,_),_) enables a lot more code
to be represented in DFG.
2025-07-21 12:33:12 -04:00
Igor Zaworski
98b8d43a4a
Fix parameter-dependent type linking ( #6170 )
2025-07-21 07:30:10 -04:00
Bartłomiej Chmiel
d419c49921
Internals: Fix unused variable, no functional change ( #6204 )
...
Signed-off-by: Bartłomiej Chmiel <bchmiel@antmicro.com>
2025-07-21 07:28:01 -04:00
Max Wipfli
a50ea2a1a6
Optimize 2 ** X to 1 << X if base is signed ( #6203 )
2025-07-20 09:56:34 -04:00
Wilson Snyder
078bb21a89
Add wire data type checking per IEEE.
2025-07-20 07:21:30 -04:00
Wilson Snyder
b8b9478938
Improve enum base type checking error message.
2025-07-19 22:37:07 -04:00
Wilson Snyder
f535a73ea7
Commentary: Changes update
2025-07-19 21:12:23 -04:00
Wilson Snyder
641e0e5672
Internals: Fix assertion if bad display
2025-07-19 21:12:10 -04:00
Ibrahim Burak Yorulmaz
9d146eae16
Fix VPI signal range order ( #6189 ) ( #6200 )
2025-07-19 20:22:02 -04:00
Wilson Snyder
7d43a935bd
Add SPECIFYIGN warning for specify constructs that were previously silently ignored.
2025-07-18 19:32:34 -04:00
Yilou Wang
9b99d9697f
Fix virtual interface member propagation ( #6175 ) ( #6184 )
2025-07-18 09:07:31 -04:00
Ryszard Rozak
a21ecb2ab9
Add support for randomize..with on objects of aliased types ( #6195 )
2025-07-18 13:04:47 +02:00
Ryszard Rozak
28808f38bb
Dump function to which AstAddrOfCFunc points ( #6188 )
2025-07-18 08:37:00 +02:00
Wilson Snyder
7a6775ca84
Internals: Rename memPeakUsageBytes
2025-07-17 22:16:59 -04:00
Wilson Snyder
e527ff49a3
Report `--stats` final results after build phase
2025-07-17 20:41:46 -04:00
Wilson Snyder
c1506deef9
Add enum base type checking per IEEE.
2025-07-17 20:20:43 -04:00
Wilson Snyder
87050670b4
Fix structure select causing 'Wide Op' error ( #6191 ).
2025-07-17 18:17:49 -04:00
Wilson Snyder
fb1373b854
Tests: Reformat. Ignore whitespace if comparing. No test functional change.
2025-07-16 21:31:40 -04:00
Wilson Snyder
7f1011e5f7
Make some CVTREAL fatal where IEEE requires it.
2025-07-16 18:07:07 -04:00
Wilson Snyder
7a32771c7e
Commentary: Changes update
2025-07-16 17:26:01 -04:00
Wilson Snyder
94b043d6c9
Internals: Print versions with `make format`
2025-07-16 17:25:22 -04:00
Igor Zaworski
8c5ba3a0d7
Fix conflicting function/class name linking error ( #6182 )
2025-07-16 17:25:01 -04:00
Igor Zaworski
826e5b0826
Fix `--coverage-expr` null pointer dereference ( #6181 )
2025-07-16 12:07:34 -04:00
Artur Bieniek
abd509ce53
Support delays in emitted Verilog ( #6177 )
2025-07-16 11:52:56 -04:00
Ryszard Rozak
1bf24c7eb4
Add support for disabling begin just under fork from outside that begin ( #5432 partial) ( #6183 )
2025-07-16 16:04:17 +02:00
Wilson Snyder
1f0357ba93
Add NOEFFECT warning, replacing previous `foreach` error.
2025-07-16 08:18:57 -04:00
Wilson Snyder
db6b17fdb4
Fix error message
2025-07-15 17:41:08 -04:00