Commit Graph

185 Commits

Author SHA1 Message Date
Geza Lore 6bc48fcdb3
Improve Dfg type system (#6390)
Added a mini type system for Dfg using DfgDataType to replace Dfg's use
of AstNodeDType. This is much more restricted and represents only the
types Dfg can handle in a canonical form. This will be needed when
adding more support for unpacked arrays and maybe unpacked structs one
day.

Also added an internal type checker for DfgGraphs which encodes all the
assumptions the code makes about type relationships in the graph. Run
this in a few places with --debug-check. Fix resulting fallout.
2025-09-07 20:38:50 +01:00
Geza Lore a49334f3e4
Internals: Move Dfg CSE into separate source file (#6363)
Parts of this algorithm were distributed over many files some
masquerading as re-usable APIs, they were not. Move everything into one
file and avoid unnecessary virtual functions.
2025-09-03 17:34:55 +01:00
Geza Lore 636a6b8cd2
Optimize complex combinational logic in DFG (#6298)
This patch adds DfgLogic, which is a vertex that represents a whole,
arbitrarily complex combinational AstAlways or AstAssignW in the
DfgGraph.

Implementing this requires computing the variables live at entry to the
AstAlways (variables read by the block), so there is a new
ControlFlowGraph data structure and a classical data-flow analysis based
live variable analysis to do that at the variable level (as opposed to
bit/element level).

The actual CFG construction and live variable analysis is best effort,
and might fail for currently unhandled constructs or data types. This
can be extended later.

V3DfgAstToDfg is changed to convert the Ast into an initial DfgGraph
containing only DfgLogic, DfgVertexSplice and DfgVertexVar vertices.

The DfgLogic are then subsequently synthesized into primitive operations
by the new V3DfgSynthesize pass, which is a combination of the old
V3DfgAstToDfg conversion and new code to handle AstAlways blocks with
complex flow control.

V3DfgSynthesize by default will synthesize roughly the same constructs
as V3DfgAstToDfg used to handle before, plus any logic that is part of a
combinational cycle within the DfgGraph. This enables breaking up these
cycles, for which there are extensions to V3DfgBreakCycles in this patch
as well. V3DfgSynthesize will then delete all non synthesized or non
synthesizable DfgLogic vertices and the rest of the Dfg pipeline is
identical, with minor changes to adjust for the changed representation.

Because with this change we can now eliminate many more UNOPTFLAT, DFG
has been disabled in all the tests that specifically target testing the
scheduling and reporting of circular combinational logic.
2025-08-19 15:06:38 +01:00
Geza Lore a300bfc538
Internals: Add AstNodeStmt.h (#6295)
Move AstNodeStmt and all its subtypes into AstNodeStmt.h.

This is the first step for #6280.

No functional change
2025-08-16 09:46:18 +01:00
Geza Lore 53332ae03e
Unify the two DFG cycle finding algorithms. (#6262)
Both V3DfgBreakCycles.cpp and V3DfgDecomposition.cpp used to contain an
implementation of the same algorithm to color strongly connected
components. Now there is only one, and it lives in V3DfgColorSCCs.cpp.
2025-08-05 13:03:30 +01:00
Geza Lore ce77bac99a
Break some combinational cycles in DFG (#6168)
Added an algorithm that can break some combinational cycles in DFG, by
attempting to trace driver logic until we escape the cycle. This can
eliminate a decent portion of UNOPTFLAT warnings. E.g. due to this code:

```systemverilog
assign a[0] = .....;
assign a[1] = ~a[0];
```
2025-07-10 18:46:45 +01:00
Wilson Snyder 3defaf8ffb Rename Verilator Config Files to Verilator Control Files.
Avoids conflict with IEEE `config`.  No functional change intended.
2025-06-27 20:38:01 -04:00
Wilson Snyder 51545b36ca Internals: Add format-make rule and standardize Makefile indents. No functional change intended. 2025-06-24 17:58:55 -04:00
Wilson Snyder 66667b6172
Support SARIF JSON diagnostic output with `--diagnostics-sarif`. (#6017) 2025-05-17 15:46:15 -04:00
Krzysztof Sychla d0c4cc3938
Support user-defined primitives (UDPs) (#468) (#5807) (#5936)
Co-authored-by: Bartłomiej Chmiel <bchmiel@antmicro.com>
Co-authored-by: Zhou Shen <599239118@qq.com>
2025-04-16 06:32:18 -04:00
Andrew Voznytsa 6a48d3bb83
Add `--make json` to enable integration with non-make/cmake build systems (#5799) 2025-03-11 19:57:21 -04:00
Wilson Snyder 8fbb725f34 Copyright year update. 2025-01-01 08:30:25 -05:00
Wilson Snyder b0f898cec8 Internals: Determine needing verilated_std without symbol table 2024-12-01 11:35:00 -05:00
Geza Lore 03bd1bfc63
Move Concat balancing from DFG to FuncOpt (#5602)
This means it applies more widely, e.g. inside sequential logic.
2024-11-10 17:23:11 +00:00
Geza Lore 77ef2cd487
Split up assignments to wides with Concat on the RHS (#5599)
Add a new pass to split up (recursively):

foo = {l, r};

into the following, with the right indices, iff the concatenation
straddles a wide word boundary.

foo[_:_] = r;
foo[_:_] = l;

This eliminates more wide temporaries.

Another 23% speedup on VeeR EH2 high_perf. Also brings the predicted
stack size from 8M to 40k.
2024-11-10 15:51:59 +00:00
Geza Lore f073b278f9
Balance concatenations in DFG (#5598)
The DFG peephole pass converts all associative trees into right leaning,
which is good for simplifying pattern recognition, but can lead to an
excessive amount of wide intermediate results being constructed for
right leaning concatenations.

Add a new pass to balance concatenation trees by trying to:
- Create VL_EDATASIZE (32-bit) sub-terms, so words can then be packed
  easily afterwards
- Try to ensure the operands of a concat are roughly the same width
  within a concatenation tree. This does not yield the shortest tree,
  but it ensures it has many sub-nodes that are small enough to fit into
  machine registers.

This can eliminate a lot of wide intermediate results, which would need
temporaries, and also increases ILP within sub-expressions (assuming the
C compiler can't figure that out itself).

This is over 2x run-time speedup on the high_perf configuration of
VeeR EH2 (which you could arguably also get with -fno-dfg, but oh well).
2024-11-09 18:14:19 +00:00
Eric Müller 4e5c7f4568
Fix build on gcc when using the spack wrapper (#5555) 2024-10-24 07:53:11 -04:00
Wilson Snyder 3525484730 Commentary 2024-09-10 19:04:55 -04:00
Bartłomiej Chmiel d6923c8571
Improve performance of V3VariableOrder with parallelization (#5406) 2024-09-06 08:04:26 -04:00
Wilson Snyder f9511e9755 Internals: Make V3Number::selfTest() 2024-08-24 05:41:22 -04:00
Arkadiusz Kozdra 2cfec0ecc3
Support clocking blocks in virtual interfaces (#5235) 2024-07-09 18:31:58 -04:00
Arkadiusz Kozdra 739be2f782
Support constrained randomization with external solvers (#4947) 2024-05-17 10:38:34 -04:00
Geza Lore 6ffff8565f
Use the same serial ordering within MTasks as we use in serial mode (#4994)
The goal here is to use as single ordering heuristic (which can be
improved later) within MTasks as we do for serial code ordering. The
heuristic itself is factored out into the new OrderMoveGraphSerializer.
This also yields slightly nicer ordering than the previously use
GraphStream, so we end up with fewer trigger (domain) conditionals in
the MTasks, this can be worth a few percent speedup.

This has the somewhat nice side-effect of reusing OrderMoveGraphVertex
for both serial and parallel mode, so MTaskMoveGraphVertex can be
removed.

Serial mode yields identical output.
2024-03-17 13:15:39 +00:00
Geza Lore e4847464d4
Split V3Partition into logically separate pieces (#4958)
V3Partition used to contain 2 conceptually separate set of algorithms

- The MTask partitioning/coarsening algorithm used by V3Order. This has
  been moved to V3OrderParallel.cpp

- The lowering of AstExecGraph into per thread functions by packing
  tasks into threads and creating additional code
  (V3Partition::finalize). This has been moved to the new
  V3ExecGraph.cpp

This patch is just code movement/rename with minimal fixes required to
do so.
2024-03-10 15:58:58 +00:00
Geza Lore 5a69321be3
Split V3Order into further part and decouple various components (#4953)
Continuing the idea of decoupling the implementations of the various algorithms.

The main points:

-Move the former "processDomain" stuff, dealing with assigning combinational logic into the relevant sensitivity domains into V3OrderProcessDomains.cpp

-Move the parallel code construction in V3OrderParallel.cpp (Could combine this with some parts of V3Partition - those not called from V3Partition::finalize - but that's not for this patch).

-Move the serial code construction into V3OrderSerial.cpp

-Factored the very small common code between the parallel and serial code construction (processMoveOneLogic) into V3OrderCFuncEmitter.cpp
2024-03-09 12:43:09 +00:00
Geza Lore acb63c929b
Split V3Order.cpp into multiple smaller files (#4950). No functional change intended.
Move OrderBuildVisitor into V3OrderGraphBuilder.cpp (and rename to
V3OrderGraphBuilder). Move ProcessMoveBuildGraph to
V3OrderMoveGraphBuilder.cpp (and rename to V3OrderGraphBuilder).

This patch is pure code movement/rename, no refactoring at all.
2024-03-07 17:12:19 -05:00
Geza Lore 0fed5f8b3e
Avoid creating redundant vertices in V3DfgPeephole (#4944)
Add a new data-structure V3DfgCache, which can be used to retrieve
existing vertices with some given inputs vertices. Use this in
V3DfgPeephole to eliminate the creation of redundant vertices.

Overall this is performance neutral, but is in prep for some future
work.
2024-03-06 18:01:52 +00:00
Geza Lore 5e1fc6e24d
Add DFG 'regularize' pass, and improve variable removal (#4937)
This functionality used to be distributed in the removeVars pass and the
final dfgToAst conversion. Instead added a new 'regularize' pass to
convert DFGs into forms that can be trivially converted back to Ast, and
a new 'eliminateVars' pass to remove/repalce redundant variables. This
simplifies dfgToAst significantly and makes the code a bit easier to
follow.

The new 'regularize' pass will ensure that every sub-expression with
multiple uses is assigned to a temporary (unless it's a trivial memory
reference or constant), and will also eliminate or replace redundant
variables. Overall it is a performance neutral change but it does
enable some later improvements which required the graph to be in this
form, and this also happens to be the form required for the dfgToAst
conversion.
2024-03-02 19:49:29 +00:00
Wilson Snyder 0ca90257a5 Add predicted stack overflow warning (#4799). 2024-01-06 16:14:58 -05:00
Wilson Snyder e76f29e5ba Copyright year update 2024-01-01 03:19:59 -05:00
Krzysztof Bieganski ea2084392f
Support --timing triggers for virtual interfaces (#4673) 2023-12-04 22:11:07 -05:00
Wilson Snyder 8b44a54bb2
Support Verilated precompiled header compilations (#4580) 2023-10-18 08:08:15 -04:00
Wilson Snyder 431bb1ed16
Support compiling Verilator with gcc/clang precompiled headers (#4579) 2023-10-17 22:49:28 -04:00
Wilson Snyder e2343c03e0 Internals: Create V3WidthCommit from overly fat header. No functional change intended. 2023-10-06 23:18:26 -04:00
Todd Strader f849073137
Fix non-inlined interface tracing (#3984) (#4530) 2023-10-03 19:55:25 -04:00
Mariusz Glebocki 28bd7e5b19
Rework multithreading handling to separate by code units that use/never use it. (#4228) 2023-09-24 22:12:23 -04:00
Kamil Rakoczy 8bd6d7c5b1
Internals: Add V3ThreadSafety (#4477) 2023-09-13 07:57:48 -04:00
Krzysztof Boronski 21c01ba97b V3Fork - transform processes that can outlive their parents into separate tasks (#4253)
Signed-off-by: Krzysztof Boronski <kboronski@antmicro.com>
2023-06-14 20:44:53 +02:00
Kamil Rakoczy b6dcec2710
Internals: Split Mutex class used in verilated code and verilator (#4048) 2023-04-11 07:23:24 -04:00
Wilson Snyder 026bbc306b Removed deprecated --cdc option. 2023-02-13 22:49:51 -05:00
Larry Doolittle 9f9c84aa64
Internals: Avoid using <tab> in the middle of lines (#3913) 2023-01-29 22:39:22 -05:00
Kamil Rakoczy a39c7f7dac
Internals: Add V3ThreadPool class (#3898)
The thread pool is self tested, but not otherwise used by the code yet.
2023-01-27 10:43:50 -05:00
Wilson Snyder bc7048e8d1 Convert verilator_includer to python3 2023-01-21 14:40:22 -05:00
Wilson Snyder b24d7c83d3 Copyright year update 2023-01-01 10:18:39 -05:00
Wilson Snyder 7d93952a0d Fix make intermediate (#3748) 2022-12-15 19:53:51 -05:00
Wilson Snyder 1ddb2dd5e7 Fix make intermediate (#3748) 2022-12-15 19:26:54 -05:00
Wilson Snyder 86e3c02339 Internal: Remove stale make rule (#3811). 2022-12-11 09:48:25 -05:00
Geza Lore 65e08f4dbf Make all expressions derive from AstNodeExpr (#3721).
Apart from the representational changes below, this patch renames
AstNodeMath to AstNodeExpr, and AstCMath to AstCExpr.

Now every expression (i.e.: those AstNodes that represent a [possibly
void] value, with value being interpreted in a very general sense) has
AstNodeExpr as a super class. This necessitates the introduction of an
AstStmtExpr, which represents an expression in statement position, e.g :
'foo();' would be represented as AstStmtExpr(AstCCall(foo)). In exchange
we can get rid of isStatement() in AstNodeStmt, which now really always
represent a statement

Peak memory consumption and verilation speed are not measurably changed.

Partial step towards #3420
2022-11-03 16:02:16 +00:00
Geza Lore 2a110c91cf Speed up DfgGraph decomposition algorithms 2022-10-11 09:55:08 +01:00
Geza Lore 965d99f1bc DFG: Make implementation more similar to AST
Use the same style, and reuse the bulk of astgen to generate DfgVertex
related code. In particular allow for easier definition of custom
DfgVertex sub-types that do not directly correspond to an AstNode
sub-type. Also introduces specific names for the fixed arity vertices.
No functional change intended.
2022-10-04 15:49:30 +01:00