luke/verilator
1
0
Fork 0
mirror of https://github.com/verilator/verilator.git synced 2026-10-06 10:03:44 +02:00
Code Issues Packages Projects Releases Wiki Activity
1,098 Commits 3 Branches 171 Tags
cc1adf9b387f8328a61c24684c29e1009de5a965
Commit Graph
6 Commits
Author SHA1 Message Date
Wilson Snyder c2c7c7bd9a Copyright year update 2012-01-15 10:26:28 -05:00
Wilson Snyder 2b330b78b7 Support bit vectors > 64 bits wide in DPI import and exports. 2011-05-20 21:33:31 -04:00
Wilson Snyder 71c1f00ec2 Copyright year update 2011-01-01 18:21:19 -05:00
Wilson Snyder 3912e5ef0b Allow empty top-level module name, to match standalone simulation 2010-02-03 19:19:18 -05:00
Wilson Snyder c4f306c145 Create vltstd to isolate duplicated headers 2010-02-01 21:39:50 -05:00
Wilson Snyder 898c08c8e0 Rename new include/verilated files for readability 2010-01-24 08:38:17 -05:00