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4 Commits

Author SHA1 Message Date
Wilson Snyder 6196cf09ff Add experimental --pipe-filter to filter all Verilog input. 2010-01-20 07:15:51 -05:00
Wilson Snyder 729dfdfed7 Copyright year update 2010-01-05 21:15:06 -05:00
Wilson Snyder 18bebaf5c3 Internals: Add parse-time symbol table for eventual typedef detection 2009-10-31 10:26:53 -04:00
Wilson Snyder f7efae93d5 Internals: Clean up the main flex/bison files to have some sanity. 
(Hopefully) no functional change.
	. V3Parse.h		External consumer interface to V3ParseImp
	. V3ParseImp		Internals to parser, common to across flex & bison
	... V3ParseGrammar	Wrapper that includes V3ParseBison
	..... V3ParseBison	Bison output
	... V3ParseLex		Wrapper that includes lex output
	..... V3Lexer.yy.cpp	Flex output
 2009-10-31 10:08:38 -04:00