27d3eb5b7b
Fix UNOPTFLAT warnings with `--coverage-trace` and always_comb ( #5821 ).
2025-03-02 20:02:55 -05:00
7f94fa1da7
Add check for `let` misused in statement context ( #5733 ).
2025-02-26 09:08:41 -05:00
3b98db17cc
Fix reset of automatic function variables ( #5747 ).
...
Also required V3Life optimize CRESET(x) ... ASSIGN(rhs, x) to remove the
extraneous CRESET to avoid creating new UNOPTFLAT situations.
2025-02-25 22:48:53 -05:00
f7ccc013e7
Improve V3EmitV for interfaces ( #5796 )
2025-02-21 16:49:14 -05:00
001c098e5a
Optimize empty function definition bodies ( #5750 ).
2025-01-25 12:13:25 -05:00
0507fb4655
Improve hierarchical DPI wrapper scheduling performance ( #2583 ) ( #5734 )
2025-01-20 14:24:09 -05:00
8fbb725f34
Copyright year update.
2025-01-01 08:30:25 -05:00
a2f327f729
Support `extern constraint`
2024-12-12 08:16:19 -05:00
a247041cab
Internals: Refactor 713dab27 to avoid IfaceRef being known in LinkCells
2024-12-03 12:00:56 -05:00
b16b48f458
Internals: Misc ANSI port parsing cleanups; baseline for future commit.
2024-12-02 07:21:39 -05:00
0c820c3068
Internals: Standardize template argument names. No functional change.
2024-11-29 20:20:38 -05:00
8db9db7e25
Internals: Rename same() function. No functional change.
2024-11-28 15:01:58 -05:00
99daa8d24b
Support `default disable iff` and `$inferred_disable` ( #4016 ).
2024-11-26 22:27:32 -05:00
a934d965be
Internals: Rename isInoutish
2024-11-25 18:25:36 -05:00
f58aee2ff2
Internals: Defer marking variables as IfaceRef until cells resolved. No functional change intended.
2024-11-24 18:33:10 -05:00
4257fcf9d0
Change parsing of cells to be non-symbol table sensitive.
2024-11-10 12:08:37 -05:00
4969125e5a
Add error on soft constraints of randc
2024-11-09 12:45:55 -05:00
3fae11595a
Support `pure constraint`.
2024-11-09 12:05:26 -05:00
b1dfdef0a9
Add error when improperly storing to parameter ( #5147 ).
2024-11-05 00:17:40 -05:00
a3d0cc6522
Fix static function wrappers ( #5536 )
...
Signed-off-by: Ryszard Rozak <rrozak@antmicro.com>
2024-10-14 07:41:17 -04:00
1710b6bab4
Support for wired nets, `wor`/`trior`/`wand`/`triand`. ( #5496 )
2024-10-09 17:53:46 -04:00
041f6603c3
Make incorrect soft ordering constraint into a hard constraint. ( #5520 )
...
An ordering constraint between NBA commit blocks ('Post' logic) and the
written variable were previously added as soft constraints (cutable
edges). However these are required for correctness, so if it ever is
cut we will have incorrect simulation results.
Change these into hard constraints instead. This necessitates adding a
flag on AstVar to ignore special variables constructed during V3Delayed
that might otherwise appear as degenerate logic loops. E.g.:
if (VdlySet) {
VdlySet = 0; // <- This write to VdlySet can and must be ignored
LHS = VdlyVal;
}
No functional change, but you might get an error if this constraint was
ever violated. (Theoretically it should never be, as these variables
were inserted in a way that does not require violating these constraints
...)
2024-10-09 11:43:53 +01:00
28ecd8e908
Support `local` and `protected` on `typedef` ( #5460 ).
2024-10-06 18:08:40 -04:00
03012da11c
Internals: astgen: Detect bad node types after edits.
...
Also add checks for nodes that can be multiple types with syntax
`AstNode<AstNodeExpr|AstNodeDType>`
2024-09-30 22:25:28 -04:00
0547108e3f
Add `-output-groups` to build with concatenated .cpp files ( #5257 )
...
Signed-off-by: Bartłomiej Chmiel <bchmiel@antmicro.com>
Signed-off-by: Ryszard Rozak <rrozak@antmicro.com>
Signed-off-by: Arkadiusz Kozdra <akozdra@antmicro.com>
Co-authored-by: Mariusz Glebocki <mglebocki@antmicro.com>
Co-authored-by: Arkadiusz Kozdra <akozdra@antmicro.com>
Co-authored-by: Bartłomiej Chmiel <bachm44@gmail.com>
Co-authored-by: Wilson Snyder <wsnyder@wsnyder.org>
Co-authored-by: Ryszard Rozak <rrozak@antmicro.com>
2024-09-30 21:42:36 -04:00
1a31aa5d62
Internals: Fix annotation checker not considering base class virtual function annotations ( #5459 )
2024-09-30 21:34:34 -04:00
d0ec6092b3
Change package import/export to link post-parsing, prep for later commit.
2024-09-28 20:55:22 -04:00
9b9a554489
Apply 'make format'
2024-09-14 00:46:48 +00:00
0fe8c73d19
Fix `$fatal` to not be affected by `+verilator+error+limit` ( #5135 ).
2024-09-13 20:45:44 -04:00
afb8428db4
Support IEEE-compliant intra-assign delays ( #3711 ) ( #5441 )
2024-09-06 18:13:52 -04:00
d6923c8571
Improve performance of V3VariableOrder with parallelization ( #5406 )
2024-09-06 08:04:26 -04:00
409efa1249
Internals: Factor out creating clocking event. No functional change.
...
Signed-off-by: Arkadiusz Kozdra <akozdra@antmicro.com>
2024-09-04 07:57:51 -04:00
8741fd17ad
Internals: cppcheck cleanups. No functional change intended.
2024-08-23 18:24:34 -04:00
930f35acc9
Support `constraint_mode` ( #5338 )
2024-08-21 06:16:44 -04:00
a730daabef
Support 'parameter type' in hierarchical blocks ( #5309 ) ( #5333 )
2024-08-21 05:30:59 -04:00
48c71ef76c
Support default value on module input ( #5358 ) ( #5373 )
2024-08-15 10:04:07 -04:00
6cb0a41857
Support inline random variable control ( #5317 )
...
Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com>
2024-08-13 14:20:31 -04:00
b100615726
Internals: Relax requirements for `AstClass` iteration methods ( #5335 )
...
Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com>
2024-08-09 10:05:52 +01:00
3426ee5170
Fix purity of functions with AstJumpBlock or AstStmtExpr ( #5332 )
2024-08-06 16:07:38 +01:00
7d5e19365e
Support assertcontrol directive type ( #5310 )
...
Signed-off-by: Bartłomiej Chmiel <bchmiel@antmicro.com>
2024-08-05 17:54:13 -04:00
2bd2b9324f
Fix inline constraints creating class random generator ( #5280 )
2024-07-19 13:03:48 -04:00
2a30a87580
Fix randomization when used with inheritance ( #5268 )
...
Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com>
2024-07-17 08:21:45 +02:00
0a9b31bb30
Add warning on dist in constraints ( #5264 )
2024-07-15 21:01:33 -04:00
131623de34
Internals: Favor s string literals. No functional change.
2024-07-14 11:39:45 -04:00
11da07d3b9
Support `$assertcontrol` assertion_type ( #5236 )
...
Signed-off-by: Bartłomiej Chmiel <bchmiel@antmicro.com>
Signed-off-by: Ryszard Rozak <rrozak@antmicro.com>
Co-authored-by: Ryszard Rozak <rrozak@antmicro.com>
Co-authored-by: Wilson Snyder <wsnyder@wsnyder.org>
2024-07-10 05:06:13 -04:00
72993ec3dd
Support cross-module clockvars access ( #5184 )
2024-06-30 15:19:02 -04:00
9e2c8aefc8
Add `--pins-sc-uint-bool` to force SystemC uint type ( #5192 )
2024-06-25 05:27:09 -04:00
3315a6e431
Internals: Also cleanup gettes/setters in .cpp. No functional change intended.
2024-06-22 19:50:59 -04:00
607c19a67d
Fix isPure to be superset of isOutputter.
...
This may cause some additional SIDEEFFECT warnings that previously were not shown.
2024-06-16 21:43:30 -04:00
f96e99542c
Internals: Fix cppcheck warnings. No functional change.
2024-06-13 21:29:03 -04:00
Wilson Snyder
Todd Strader
Bartłomiej Chmiel
Ryszard Rozak
Zhou Shen
Geza Lore
Mariusz Glebocki
github action
Krzysztof Bieganski
Arkadiusz Kozdra
Drew Ranck