Fix timeprecision backward assignment (#6469)

Signed-off-by: Artur Bieniek <abieniek@internships.antmicro.com>

src/V3EmitCFunc.h

@@ -1180,8 +1180,10 @@ public:
     void visit(AstTime* nodep) override {
         putns(nodep, "VL_TIME_UNITED_Q(");
         UASSERT_OBJ(!nodep->timeunit().isNone(), nodep, "$time has no units");
-        puts(cvtToStr(nodep->timeunit().multiplier()
-                      / v3Global.rootp()->timeprecision().multiplier()));
+        const double time
+            = nodep->timeunit().multiplier() / v3Global.rootp()->timeprecision().multiplier();
+        UASSERT_OBJ(time >= 1, nodep, "TimeQ is less than 1, will result in division by zero");
+        puts(cvtToStr(time));
         puts(")");
     }
     void visit(AstTimeD* nodep) override {

src/V3ParseImp.cpp

@@ -119,7 +119,7 @@ void V3ParseImp::lexTimescaleParse(FileLine* fl, const char* textp) {
     VTimescale prec;
     VTimescale::parseSlashed(fl, textp, unit /*ref*/, prec /*ref*/);
     m_timeLastUnit = v3Global.opt.timeComputeUnit(unit);
-    v3Global.rootp()->timeprecisionMerge(fl, prec);
+    m_timeLastPrec = v3Global.opt.timeComputePrec(prec);
 }
 AstPragma* V3ParseImp::createTimescale(FileLine* fl, bool unitSet, double unitVal, bool precSet,
                                        double precVal) {

src/V3ParseImp.h

@@ -168,6 +168,7 @@ class V3ParseImp final {
 
     AstNode* m_tagNodep = nullptr;  // Points to the node to set to m_tag or nullptr to not set.
     VTimescale m_timeLastUnit;  // Last `timescale's unit
+    VTimescale m_timeLastPrec;  // Last `timescale's precision
 
 public:
     VL_DEFINE_DEBUG_FUNCTIONS;
@@ -185,6 +186,7 @@ public:
     AstPragma* createTimescale(FileLine* fl, bool unitSet, double unitVal, bool precSet,
                                double precVal) VL_MT_DISABLED;
     VTimescale timeLastUnit() const { return m_timeLastUnit; }
+    VTimescale timeLastPrec() const { return m_timeLastPrec; }
 
     void lexFileline(FileLine* fl) { m_lexFileline = fl; }
     FileLine* lexFileline() const { return m_lexFileline; }
@@ -286,6 +288,7 @@ public:
         , m_filterp{filterp} {
         m_lexKwdLast = stateVerilogRecent();
         m_timeLastUnit = v3Global.opt.timeDefaultUnit();
+        m_timeLastPrec = v3Global.opt.timeDefaultPrec();
     }
     ~V3ParseImp() VL_MT_DISABLED;
     void parserClear() VL_MT_DISABLED;

src/verilog.y

@@ -1062,6 +1062,8 @@ packageFront<nodeModulep>:
                           $$->lifetime($2);
                           $$->modTrace(GRAMMARP->allTracingOn($$->fileline()));
                           $$->timeunit(PARSEP->timeLastUnit());
+                          PARSEP->rootp()->timeprecisionMerge($$->fileline(),
+                                                              PARSEP->timeLastPrec());
                           PARSEP->rootp()->addModulesp($$); }
         ;
 
@@ -1199,6 +1201,8 @@ modFront<nodeModulep>:
                           $$->inLibrary(PARSEP->inLibrary() || $$->fileline()->celldefineOn());
                           $$->modTrace(GRAMMARP->allTracingOn($$->fileline()));
                           $$->timeunit(PARSEP->timeLastUnit());
+                          PARSEP->rootp()->timeprecisionMerge($$->fileline(),
+                                                              PARSEP->timeLastPrec());
                           $$->unconnectedDrive(PARSEP->unconnectedDrive());
                           PARSEP->rootp()->addModulesp($$); }
         |       modFront sigAttrScope                   { $$ = $1; }
@@ -1581,6 +1585,8 @@ pgmFront<nodeModulep>:
                           $$->inLibrary(PARSEP->inLibrary() || $$->fileline()->celldefineOn());
                           $$->modTrace(GRAMMARP->allTracingOn($$->fileline()));
                           $$->timeunit(PARSEP->timeLastUnit());
+                          PARSEP->rootp()->timeprecisionMerge($$->fileline(),
+                                                              PARSEP->timeLastPrec());
                           PARSEP->rootp()->addModulesp($$); }
         ;
 
@@ -7145,6 +7151,8 @@ checkerFront<nodeModulep>:  // IEEE: part of checker_declaration
                         { $$ = new AstModule{$<fl>2, *$2, PARSEP->libname(), AstModule::Checker{}};
                           $$->modTrace(GRAMMARP->allTracingOn($$->fileline()));
                           $$->timeunit(PARSEP->timeLastUnit());
+                          PARSEP->rootp()->timeprecisionMerge($$->fileline(),
+                                                              PARSEP->timeLastPrec());
                           $$->unconnectedDrive(PARSEP->unconnectedDrive()); }
         |       checkerFront sigAttrScope               { $$ = $1; }
         ;

test_regress/t/t_timescale_nobackwards.out

@@ -0,0 +1,10 @@
+Time scale of mod is 1ps / 1ps
+0
+Time scale of pkg is 1ps / 1ps
+0
+Time scale of CHK is 1ps / 1ps
+0
+Time scale of PRG is 1ps / 1ps
+0
+Time scale of CLS is 1ps / 1ps
+0

test_regress/t/t_timescale_nobackwards.py

@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile()
+
+test.execute(expect_filename=test.golden_filename)
+
+test.passes()

test_regress/t/t_timescale_nobackwards.v

@@ -0,0 +1,41 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Antmicro.
+// SPDX-License-Identifier: CC0-1.0
+
+`define checkf function void f(); $printtimescale; $display("%0t", $time); endfunction
+
+package pkg;
+  `checkf;
+endpackage
+
+checker CHK();
+  `checkf;
+endchecker
+
+program PRG;
+  `checkf;
+endprogram
+
+class CLS;
+  static `checkf;
+endclass
+
+module mod;
+  CHK chk();
+  PRG prg();
+  initial begin
+    $printtimescale;
+    $display("%0t", $time);
+
+    pkg::f();
+    chk.f();
+    prg.f();
+    CLS::f();
+
+    $finish;
+  end
+endmodule
+
+`timescale 1ns / 10ps