Tests: Add $dist tests
This commit is contained in:
Wilson Snyder
parent
0af3efda5c
commit
e266b2cb03
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@ -9,7 +9,6 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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scenarios(simulator => 1);
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scenarios(simulator => 1);
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$Self->{vcs} and unsupported("VCS unsupported");
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compile(
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compile(
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v_flags2 => ['+define+T_PACKAGE_EXPORT',],
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v_flags2 => ['+define+T_PACKAGE_EXPORT',],
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@ -0,0 +1,43 @@
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%Error: t/t_probdist.v:18:11: Unsupported or unknown PLI call: '$dist_chi_square'
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18 | r = $dist_chi_square(seed, 5);
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| ^~~~~~~~~~~~~~~~
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%Error: t/t_probdist.v:22:25: Unsupported or unknown PLI call: '$dist_chi_square'
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22 | repeat(20) sum += $dist_chi_square(seed, 5);
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| ^~~~~~~~~~~~~~~~
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%Error: t/t_probdist.v:26:11: Unsupported or unknown PLI call: '$dist_erlang'
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26 | r = $dist_erlang(seed, 5, 10);
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| ^~~~~~~~~~~~
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%Error: t/t_probdist.v:30:25: Unsupported or unknown PLI call: '$dist_erlang'
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30 | repeat(20) sum += $dist_erlang(seed, 5, 10);
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| ^~~~~~~~~~~~
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%Error: t/t_probdist.v:34:11: Unsupported or unknown PLI call: '$dist_exponential'
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34 | r = $dist_exponential(seed, 5);
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| ^~~~~~~~~~~~~~~~~
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%Error: t/t_probdist.v:38:25: Unsupported or unknown PLI call: '$dist_exponential'
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38 | repeat(20) sum += $dist_exponential(seed, 5);
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| ^~~~~~~~~~~~~~~~~
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%Error: t/t_probdist.v:42:11: Unsupported or unknown PLI call: '$dist_normal'
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42 | r = $dist_normal(seed, 5, 10);
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| ^~~~~~~~~~~~
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%Error: t/t_probdist.v:46:25: Unsupported or unknown PLI call: '$dist_normal'
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46 | repeat(20) sum += $dist_normal(seed, 5, 10);
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| ^~~~~~~~~~~~
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%Error: t/t_probdist.v:50:11: Unsupported or unknown PLI call: '$dist_poisson'
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50 | r = $dist_poisson(seed, 5);
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| ^~~~~~~~~~~~~
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%Error: t/t_probdist.v:54:25: Unsupported or unknown PLI call: '$dist_poisson'
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54 | repeat(20) sum += $dist_poisson(seed, 5);
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| ^~~~~~~~~~~~~
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%Error: t/t_probdist.v:58:11: Unsupported or unknown PLI call: '$dist_t'
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58 | r = $dist_t(seed, 5);
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| ^~~~~~~
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%Error: t/t_probdist.v:62:25: Unsupported or unknown PLI call: '$dist_t'
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62 | repeat(20) sum += $dist_t(seed, 5);
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| ^~~~~~~
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%Error: t/t_probdist.v:66:11: Unsupported or unknown PLI call: '$dist_uniform'
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66 | r = $dist_uniform(seed, 5, 10);
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| ^~~~~~~~~~~~~
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%Error: t/t_probdist.v:70:25: Unsupported or unknown PLI call: '$dist_uniform'
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70 | repeat(20) sum += $dist_uniform(seed, 5, 10);
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| ^~~~~~~~~~~~~
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%Error: Exiting due to
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@ -0,0 +1,23 @@
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#!/usr/bin/env perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2022 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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scenarios(simulator => 1);
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compile(
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fails => $Self->{vlt_all},
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expect_filename => $Self->{golden_filename},
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);
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execute(
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check_finished => 1,
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) if !$Self->{vlt_all};
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ok(1);
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1;
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@ -0,0 +1,77 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2022 by Wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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`define checkd(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d: got=%0d exp=%0d\n", `__FILE__,`__LINE__, (gotv), (expv)); $stop; end while(0);
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module t(/*AUTOARG*/);
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integer seed;
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integer r;
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integer sum;
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initial begin
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// Illegal values
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seed = 1234;
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r = $dist_chi_square(seed, 5);
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`checkd(seed, 923940542);
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`checkd(r, 8);
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sum = 1;
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repeat(20) sum += $dist_chi_square(seed, 5);
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`checkd(sum, 130);
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seed = 1234;
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r = $dist_erlang(seed, 5, 10);
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`checkd(seed, 1025211431);
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`checkd(r, 19);
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sum = 1;
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repeat(20) sum += $dist_erlang(seed, 5, 10);
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`checkd(sum, 173);
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seed = 1234;
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r = $dist_exponential(seed, 5);
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`checkd(seed, 85231147);
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`checkd(r, 20);
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sum = 1;
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repeat(20) sum += $dist_exponential(seed, 5);
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`checkd(sum, 104);
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seed = 1234;
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r = $dist_normal(seed, 5, 10);
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`checkd(seed, -1570070672);
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`checkd(r, 4);
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sum = 1;
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repeat(20) sum += $dist_normal(seed, 5, 10);
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`checkd(sum, 114);
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seed = 1234;
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r = $dist_poisson(seed, 5);
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`checkd(seed, 418012337);
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`checkd(r, 2);
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sum = 1;
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repeat(20) sum += $dist_poisson(seed, 5);
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`checkd(sum, 111);
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seed = 1234;
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r = $dist_t(seed, 5);
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`checkd(seed, -797481412);
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`checkd(r, 0);
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sum = 1;
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repeat(20) sum += $dist_t(seed, 5);
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`checkd(sum, -2);
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seed = 1234;
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r = $dist_uniform(seed, 5, 10);
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`checkd(seed, 85231147);
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`checkd(r, 5);
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sum = 1;
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repeat(20) sum += $dist_uniform(seed, 5, 10);
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`checkd(sum, 147);
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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@ -0,0 +1,19 @@
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%Error: t/t_probdist_bad.v:16:11: Unsupported or unknown PLI call: '$dist_chi_square'
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16 | r = $dist_chi_square(seed, 0);
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| ^~~~~~~~~~~~~~~~
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%Error: t/t_probdist_bad.v:18:11: Unsupported or unknown PLI call: '$dist_erlang'
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18 | r = $dist_erlang(seed, 0, 0);
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| ^~~~~~~~~~~~
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%Error: t/t_probdist_bad.v:20:11: Unsupported or unknown PLI call: '$dist_exponential'
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20 | r = $dist_exponential(seed, 0);
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| ^~~~~~~~~~~~~~~~~
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%Error: t/t_probdist_bad.v:23:11: Unsupported or unknown PLI call: '$dist_poisson'
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23 | r = $dist_poisson(seed, 0);
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| ^~~~~~~~~~~~~
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%Error: t/t_probdist_bad.v:25:11: Unsupported or unknown PLI call: '$dist_t'
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25 | r = $dist_t(seed, 0);
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| ^~~~~~~
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%Error: t/t_probdist_bad.v:27:11: Unsupported or unknown PLI call: '$dist_uniform'
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27 | r = $dist_uniform(seed, 10, 0);
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| ^~~~~~~~~~~~~
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%Error: Exiting due to
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#!/usr/bin/env perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2022 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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scenarios(simulator => 1);
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compile(
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fails => $Self->{vlt_all},
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expect_filename => $Self->{golden_filename},
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);
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execute(
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check_finished => 1,
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) if !$Self->{vlt_all};
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ok(1);
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1;
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@ -0,0 +1,34 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2022 by Wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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`define checkd(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d: got=%0d exp=%0d\n", `__FILE__,`__LINE__, (gotv), (expv)); $stop; end while(0);
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module t(/*AUTOARG*/);
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integer seed;
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integer r;
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initial begin
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// Illegal values
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r = $dist_chi_square(seed, 0);
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if (r != 0 && !$isunknown(r)) $stop;
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r = $dist_erlang(seed, 0, 0);
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if (r != 0 && !$isunknown(r)) $stop;
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r = $dist_exponential(seed, 0);
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if (r != 0 && !$isunknown(r)) $stop;
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// r =$dist_exponential(seed, mean); // Always valid
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r = $dist_poisson(seed, 0);
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if (r != 0 && !$isunknown(r)) $stop;
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r = $dist_t(seed, 0);
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if (r != 0 && !$isunknown(r)) $stop;
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r = $dist_uniform(seed, 10, 0);
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if (r != 10 && !$isunknown(r)) $stop;
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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