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https://github.com/verilator/verilator.git
synced 2026-10-02 16:13:34 +02:00
Fix .vlt public_flat* and others to support long identifier names (#6516)
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+2
-2
@@ -585,8 +585,8 @@ public:
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// ACCESSORS
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virtual string name() const VL_MT_STABLE { return ""; }
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virtual string origName() const { return ""; }
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string prettyOrigOrName() const {
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return prettyName(origName().empty() ? name() : origName());
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string prettyDehashOrigOrName() const {
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return prettyName(VName::dehash(origName().empty() ? name() : origName()));
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}
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virtual void name(const string& name) {
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this->v3fatalSrc("name() called on object without name() method");
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+11
-11
@@ -263,7 +263,7 @@ public:
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const VPragmaType pragma = VPragmaType::COVERAGE_BLOCK_OFF;
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if (!nodep->unnamed()) {
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for (const string& i : m_coverageOffBlocks) {
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if (VString::wildmatch(nodep->prettyOrigOrName(), i)) {
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if (VString::wildmatch(nodep->prettyDehashOrigOrName(), i)) {
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nodep->addItemsp(new AstPragma{nodep->fileline(), pragma});
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}
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}
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@@ -274,7 +274,7 @@ public:
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const VPragmaType pragma = VPragmaType::COVERAGE_BLOCK_OFF;
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if (!nodep->unnamed()) {
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for (const string& i : m_coverageOffBlocks) {
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if (VString::wildmatch(nodep->prettyOrigOrName(), i)) {
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if (VString::wildmatch(nodep->prettyDehashOrigOrName(), i)) {
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nodep->addStmtsp(new AstPragma{nodep->fileline(), pragma});
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}
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}
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@@ -754,7 +754,7 @@ void V3Control::applyCoverageBlock(AstNodeModule* modulep, AstBegin* nodep) {
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const string& filename = nodep->fileline()->filename();
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V3ControlFile* const filep = V3ControlResolver::s().files().resolve(filename);
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if (filep) filep->applyBlock(nodep);
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const string& modname = modulep->prettyOrigOrName();
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const string& modname = modulep->prettyDehashOrigOrName();
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V3ControlModule* const modp = V3ControlResolver::s().modules().resolve(modname);
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if (modp) modp->applyBlock(nodep);
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}
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@@ -763,7 +763,7 @@ void V3Control::applyCoverageBlock(AstNodeModule* modulep, AstGenBlock* nodep) {
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const string& filename = nodep->fileline()->filename();
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V3ControlFile* const filep = V3ControlResolver::s().files().resolve(filename);
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if (filep) filep->applyBlock(nodep);
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const string& modname = modulep->prettyOrigOrName();
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const string& modname = modulep->prettyDehashOrigOrName();
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V3ControlModule* const modp = V3ControlResolver::s().modules().resolve(modname);
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if (modp) modp->applyBlock(nodep);
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}
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@@ -775,16 +775,16 @@ void V3Control::applyIgnores(FileLine* filelinep) {
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}
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void V3Control::applyModule(AstNodeModule* modulep) {
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const string& modname = modulep->prettyOrigOrName();
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const string& modname = modulep->prettyDehashOrigOrName();
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V3ControlModule* const modp = V3ControlResolver::s().modules().resolve(modname);
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if (modp) modp->apply(modulep);
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}
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void V3Control::applyFTask(AstNodeModule* modulep, AstNodeFTask* ftaskp) {
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const string& modname = modulep->prettyOrigOrName();
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const string& modname = modulep->prettyDehashOrigOrName();
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V3ControlModule* const modp = V3ControlResolver::s().modules().resolve(modname);
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if (!modp) return;
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const V3ControlFTask* const ftp = modp->ftasks().resolve(ftaskp->prettyOrigOrName());
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const V3ControlFTask* const ftp = modp->ftasks().resolve(ftaskp->prettyDehashOrigOrName());
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if (ftp) ftp->apply(ftaskp);
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}
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@@ -792,14 +792,14 @@ void V3Control::applyVarAttr(const AstNodeModule* modulep, const AstNodeFTask* f
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AstVar* varp) {
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V3ControlVar* vp;
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V3ControlModule* const modp
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= V3ControlResolver::s().modules().resolve(modulep->prettyOrigOrName());
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= V3ControlResolver::s().modules().resolve(modulep->prettyDehashOrigOrName());
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if (!modp) return;
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if (ftaskp) {
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V3ControlFTask* const ftp = modp->ftasks().resolve(ftaskp->prettyOrigOrName());
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V3ControlFTask* const ftp = modp->ftasks().resolve(ftaskp->prettyDehashOrigOrName());
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if (!ftp) return;
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vp = ftp->vars().resolve(varp->prettyOrigOrName());
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vp = ftp->vars().resolve(varp->prettyDehashOrigOrName());
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} else {
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vp = modp->vars().resolve(varp->prettyOrigOrName());
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vp = modp->vars().resolve(varp->prettyDehashOrigOrName());
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}
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if (vp) vp->apply(varp);
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}
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@@ -156,7 +156,8 @@ int _mon_check_iter() {
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TEST_CHECK_CSTR(p, "\\mod.with_dot ");
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if (TestSimulator::is_verilator()) {
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p = vpi_get_str(vpiDefName, vh2);
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TEST_CHECK_CSTR(p, "sub");
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TEST_CHECK_CSTR(
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p, "sub_with_very___05Fvery_____VhshsmH6BYHIAHq4mnPF8T3lXnhhONMT1I4ouBvkJk58");
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}
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TestVpiHandle vh_null_name = my_vpi_handle("___0_");
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@@ -62,13 +62,13 @@ extern "C" int mon_check();
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integer status;
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sub a0 (.cyc(cyc));
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sub_with_very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very_long_name a0 (.cyc(cyc));
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sub \mod.with_dot (.cyc(cyc));
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sub_with_very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very_long_name \mod.with_dot (.cyc(cyc));
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// Check if scope names are not decoded twice
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sub ___0F_ (.cyc(cyc));
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sub ___0_ (.cyc(cyc));
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sub_with_very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very_long_name ___0F_ (.cyc(cyc));
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sub_with_very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very_long_name ___0_ (.cyc(cyc));
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initial begin
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@@ -112,12 +112,12 @@ extern "C" int mon_check();
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endmodule
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module sub (
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module sub_with_very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very_long_name (
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input [31:0] cyc /*verilator public_flat_rd*/
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);
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reg \b.c /*verilator public_flat_rw*/;
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reg subsig1 /*verilator public_flat_rd*/;
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reg subsig2 /*verilator public_flat_rd*/;
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reg subsig2; // public in .vlt
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`ifdef IVERILOG
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// stop icarus optimizing signals away
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wire redundant = subsig1 | subsig2 | \b.c ;
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@@ -7,3 +7,4 @@
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`verilator_config
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public_flat_rd -module "*" -var "double__underscore__vlt"
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public_flat_rd -module "sub_with_very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very__very_long_name" -var "subsig2"
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