Tests: Improve internal coverage holes
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// -*- mode: C++; c-file-style: "cc-mode" -*-
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//
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2010 by Wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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#include <verilated.h>
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#include VM_PREFIX_INCLUDE
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//======================================================================
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#include "Vt_dpi_export_scope_bad__Dpi.h"
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#ifdef NEED_EXTERNS
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extern "C" {
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extern void dpix_task();
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}
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#endif
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//======================================================================
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unsigned int main_time = 0;
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double sc_time_stamp() { return main_time; }
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VM_PREFIX* topp = nullptr;
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int main(int argc, char* argv[]) {
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topp = new VM_PREFIX;
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Verilated::debug(0);
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topp->eval();
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topp->final();
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VL_DO_DANGLING(delete topp, topp);
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return 1;
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}
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void dpix_run_tests() {
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dpix_task(); // Wrong scope
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}
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%Error: unknown:0: Testbench C called 'dpix_task' but this DPI export function exists only in other scopes, not scope 'TOP.t'
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Aborting...
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@ -0,0 +1,24 @@
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#!/usr/bin/env perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2003 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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scenarios(simulator => 1);
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compile(
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v_flags2 => ["--exe $Self->{t_dir}/$Self->{name}.cpp"],
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make_main => 0,
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);
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execute(
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fails => 1,
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expect_filename => $Self->{golden_filename},
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);
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ok(1);
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1;
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@ -0,0 +1,21 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// Copyright 2020 by Wilson Snyder. This program is free software; you can
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// redistribute it and/or modify it under the terms of either the GNU
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// Lesser General Public License Version 3 or the Perl Artistic License
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// Version 2.0.
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// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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module t;
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s s();
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import "DPI-C" context function void dpix_run_tests();
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initial dpix_run_tests();
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endmodule
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module s;
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export "DPI-C" task dpix_task;
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task dpix_task();
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$write("Hello in %m\n");
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endtask
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endmodule
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@ -11,11 +11,14 @@
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#include <verilated.h>
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#include <verilated_cov.h>
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#include "TestCheck.h"
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#include VM_PREFIX_INCLUDE
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double sc_time_stamp() { return 0; }
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int errors = 0;
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VerilatedMutex outputMutex;
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#ifdef T_WRAPPER_CONTEXT
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@ -89,6 +92,14 @@ int main(int argc, char** argv, char** env) {
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context0p->traceEverOn(true);
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context1p->traceEverOn(true);
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// error number checks
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TEST_CHECK_EQ(context0p->errorCount(), 0);
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TEST_CHECK_EQ(context1p->errorCount(), 0);
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context0p->errorCount(1);
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TEST_CHECK_EQ(context0p->errorCount(), 1);
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context0p->errorCount(0);
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TEST_CHECK_EQ(context0p->errorCount(), 0);
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// instantiate verilated design
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std::unique_ptr<VM_PREFIX> top0p{new VM_PREFIX{context0p.get(), "top0"}};
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std::unique_ptr<VM_PREFIX> top1p{new VM_PREFIX{context1p.get(), "top1"}};
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@ -108,7 +119,10 @@ int main(int argc, char** argv, char** env) {
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// check if both finished
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bool pass = true;
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if (top0p->done_o && top1p->done_o) {
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if (errors) {
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std::cout << "Error: comparison errors" << std::endl;
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pass = false;
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} else if (top0p->done_o && top1p->done_o) {
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std::cout << "*-* All Finished *-*" << std::endl;
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} else {
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std::cout << "Error: Early termination!" << std::endl;
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