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https://github.com/verilator/verilator.git
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Merge branch 'master' into develop-v5
This commit is contained in:
+12
-22
@@ -39,6 +39,8 @@
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#include <unordered_map>
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#include <unordered_set>
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VL_DEFINE_DEBUG_FUNCTIONS;
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class GateDedupeVarVisitor;
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using GateVarRefList = std::list<AstNodeVarRef*>;
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@@ -47,13 +49,6 @@ constexpr int GATE_DEDUP_MAX_DEPTH = 20;
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//######################################################################
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class GateBaseVisitor VL_NOT_FINAL : public VNVisitor {
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public:
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VL_DEBUG_FUNC; // Declare debug()
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};
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//######################################################################
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class GateLogicVertex;
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class GateVarVertex;
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class GateGraphBaseVisitor VL_NOT_FINAL {
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@@ -64,7 +59,6 @@ public:
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virtual ~GateGraphBaseVisitor() = default;
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virtual VNUser visit(GateLogicVertex* vertexp, VNUser vu = VNUser{0}) = 0;
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virtual VNUser visit(GateVarVertex* vertexp, VNUser vu = VNUser{0}) = 0;
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VL_DEBUG_FUNC; // Declare debug()
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};
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//######################################################################
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@@ -194,7 +188,7 @@ public:
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//######################################################################
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// Is this a simple math expression with a single input and single output?
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class GateOkVisitor final : public GateBaseVisitor {
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class GateOkVisitor final : public VNVisitor {
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private:
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// RETURN STATE
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bool m_isSimple = true; // Set false when we know it isn't simple
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@@ -311,7 +305,7 @@ static void eliminate(AstNode* logicp,
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// ######################################################################
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// Gate class functions
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class GateVisitor final : public GateBaseVisitor {
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class GateVisitor final : public VNVisitor {
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private:
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// NODE STATE
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// Entire netlist:
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@@ -423,13 +417,12 @@ private:
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// VISITORS
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void visit(AstNetlist* nodep) override {
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iterateChildren(nodep);
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// if (debug() > 6) m_graph.dump();
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if (debug() > 6) m_graph.dumpDotFilePrefixed("gate_pre");
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if (dumpGraph() >= 3) m_graph.dumpDotFilePrefixed("gate_pre");
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warnSignals(); // Before loss of sync/async pointers
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// Decompose clock vectors -- need to do this before removing redundant edges
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decomposeClkVectors();
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m_graph.removeRedundantEdgesSum(&V3GraphEdge::followAlwaysTrue);
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m_graph.dumpDotFilePrefixed("gate_simp");
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if (dumpGraph() >= 6) m_graph.dumpDotFilePrefixed("gate_simp");
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// Find gate interconnect and optimize
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m_graph.userClearVertices(); // vertex->user(): bool. Indicates we've set it as consumed
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// Get rid of buffers first,
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@@ -441,15 +434,15 @@ private:
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// Remove redundant logic
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if (v3Global.opt.fDedupe()) {
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dedupe();
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if (debug() >= 6) m_graph.dumpDotFilePrefixed("gate_dedup");
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if (dumpGraph() >= 6) m_graph.dumpDotFilePrefixed("gate_dedup");
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}
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if (v3Global.opt.fAssemble()) {
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mergeAssigns();
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if (debug() >= 6) m_graph.dumpDotFilePrefixed("gate_assm");
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if (dumpGraph() >= 6) m_graph.dumpDotFilePrefixed("gate_assm");
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}
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// Consumption warnings
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consumedMark();
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m_graph.dumpDotFilePrefixed("gate_opt");
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if (dumpGraph() >= 3) m_graph.dumpDotFilePrefixed("gate_opt");
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// Rewrite assignments
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consumedMove();
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}
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@@ -791,8 +784,6 @@ private:
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V3DupFinder m_dupFinder; // Duplicate finder for rhs of assigns
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std::unordered_set<AstNode*> m_nodeDeleteds; // Any node in this hash was deleted
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VL_DEBUG_FUNC; // Declare debug()
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bool same(AstNode* node1p, AstNode* node2p) {
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// Regarding the complexity of this funcition 'same':
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// Applying this comparison function to a a set of n trees pairwise is O(n^2) in the
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@@ -897,7 +888,7 @@ public:
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//######################################################################
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// Have we seen the rhs of this assign before?
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class GateDedupeVarVisitor final : public GateBaseVisitor {
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class GateDedupeVarVisitor final : public VNVisitor {
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// Given a node, it is visited to try to find the AstNodeAssign under
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// it that can used for dedupe.
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// Right now, only the following node trees are supported for dedupe.
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@@ -1081,7 +1072,6 @@ private:
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const GateLogicVertex* const consumeVertexp
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= static_cast<GateLogicVertex*>(outedgep->top());
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AstNode* const consumerp = consumeVertexp->nodep();
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// if (debug() >= 9) m_graphp->dumpDotFilePrefixed("gate_preelim");
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UINFO(9,
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"elim src vtx" << lvertexp << " node " << lvertexp->nodep() << endl);
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UINFO(9,
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@@ -1297,7 +1287,7 @@ void GateVisitor::mergeAssigns() {
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//######################################################################
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// Find a var's offset in a concatenation
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class GateConcatVisitor final : public GateBaseVisitor {
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class GateConcatVisitor final : public VNVisitor {
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private:
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// STATE
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const AstVarScope* m_vscp = nullptr; // Varscope we're trying to find
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@@ -1493,5 +1483,5 @@ void GateVisitor::decomposeClkVectors() {
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void V3Gate::gateAll(AstNetlist* nodep) {
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UINFO(2, __FUNCTION__ << ": " << endl);
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{ const GateVisitor visitor{nodep}; } // Destruct before checking
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V3Global::dumpCheckGlobalTree("gate", 0, v3Global.opt.dumpTreeLevel(__FILE__) >= 3);
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V3Global::dumpCheckGlobalTree("gate", 0, dumpTree() >= 3);
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}
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