Fix t_constraint_unsup out message

Signed-off-by: Kamil Danecki <kdanecki@internships.antmicro.com>

test_regress/t/t_constraint_unsup.out

@@ -1,5 +1,5 @@
 %Error-UNSUPPORTED: t/t_constraint_unsup.v:9:27: Unsupported expression inside constraint
-    9 |   constraint cons { m_one ** 2 > 0; }
+    9 |    constraint cons { x + 1.0 > 0.0; }
-      |                           ^~
+      |                              ^
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Error: Exiting due to

test_regress/t/t_constraint_unsup.v

@@ -5,8 +5,8 @@
 // SPDX-License-Identifier: CC0-1.0
 
 class Packet;
-   rand real m_one;
+   rand real x;
-   constraint cons { m_one + 1.0 > 0.0; }
+   constraint cons { x + 1.0 > 0.0; }
 endclass
 
 module t;