Report unclocked concurrent assertion as an error
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@ -91,7 +91,8 @@ private:
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fromAlways = true;
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fromAlways = true;
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}
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}
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if (!senip) {
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if (!senip) {
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nodep->v3warn(E_UNSUPPORTED, "Unsupported: Unclocked assertion");
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nodep->v3error("Concurrent assertion has no clock; provide a clocking event, a default"
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" clocking, or a clocked procedural context (IEEE 1800-2023 16.16)");
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newp = new AstSenTree{nodep->fileline(), nullptr};
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newp = new AstSenTree{nodep->fileline(), nullptr};
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} else {
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} else {
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if (cassertp && fromAlways) cassertp->senFromAlways(true);
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if (cassertp && fromAlways) cassertp->senFromAlways(true);
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@ -0,0 +1,18 @@
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%Error: t/t_assert_unclocked_bad.v:9:3: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
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: ... note: In instance 't'
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9 | assert property (a);
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| ^~~~~~
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... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
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%Error: t/t_assert_unclocked_bad.v:10:22: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
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: ... note: In instance 't'
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10 | assert property (a |=> b);
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| ^~~
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%Error: t/t_assert_unclocked_bad.v:10:3: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
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: ... note: In instance 't'
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10 | assert property (a |=> b);
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| ^~~~~~
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%Error: t/t_assert_unclocked_bad.v:11:3: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
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: ... note: In instance 't'
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11 | cover property (a);
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| ^~~~~
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%Error: Exiting due to
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@ -0,0 +1,16 @@
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#!/usr/bin/env python3
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# This program is free software; you can redistribute it and/or modify it
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# under the terms of either the GNU Lesser General Public License Version 3
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# or the Perl Artistic License Version 2.0.
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# SPDX-FileCopyrightText: 2026 Wilson Snyder
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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import vltest_bootstrap
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test.scenarios('vlt')
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test.lint(expect_filename=test.golden_filename, fails=True)
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test.passes()
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@ -0,0 +1,12 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain.
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// SPDX-FileCopyrightText: 2026 PlanV GmbH
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// SPDX-License-Identifier: CC0-1.0
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module t;
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logic a, b;
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assert property (a);
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assert property (a |=> b);
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cover property (a);
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endmodule
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@ -1,26 +1,26 @@
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%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:115:21: Unsupported: Unclocked assertion
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%Error: t/t_property_pexpr_unsup.v:115:21: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
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: ... note: In instance 't'
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: ... note: In instance 't'
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115 | assert property ((s_eventually a) implies (s_eventually a));
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115 | assert property ((s_eventually a) implies (s_eventually a));
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| ^~~~~~~~~~~~
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| ^~~~~~~~~~~~
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... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
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... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
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%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:115:46: Unsupported: Unclocked assertion
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%Error: t/t_property_pexpr_unsup.v:115:46: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
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: ... note: In instance 't'
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: ... note: In instance 't'
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115 | assert property ((s_eventually a) implies (s_eventually a));
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115 | assert property ((s_eventually a) implies (s_eventually a));
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| ^~~~~~~~~~~~
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| ^~~~~~~~~~~~
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%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:115:3: Unsupported: Unclocked assertion
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%Error: t/t_property_pexpr_unsup.v:115:3: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
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: ... note: In instance 't'
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: ... note: In instance 't'
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115 | assert property ((s_eventually a) implies (s_eventually a));
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115 | assert property ((s_eventually a) implies (s_eventually a));
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| ^~~~~~
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| ^~~~~~
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%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:117:21: Unsupported: Unclocked assertion
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%Error: t/t_property_pexpr_unsup.v:117:21: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
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: ... note: In instance 't'
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: ... note: In instance 't'
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117 | assert property ((s_eventually a) iff (s_eventually a));
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117 | assert property ((s_eventually a) iff (s_eventually a));
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| ^~~~~~~~~~~~
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| ^~~~~~~~~~~~
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%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:117:42: Unsupported: Unclocked assertion
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%Error: t/t_property_pexpr_unsup.v:117:42: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
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: ... note: In instance 't'
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: ... note: In instance 't'
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117 | assert property ((s_eventually a) iff (s_eventually a));
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117 | assert property ((s_eventually a) iff (s_eventually a));
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| ^~~~~~~~~~~~
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| ^~~~~~~~~~~~
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%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:117:3: Unsupported: Unclocked assertion
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%Error: t/t_property_pexpr_unsup.v:117:3: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
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: ... note: In instance 't'
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: ... note: In instance 't'
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117 | assert property ((s_eventually a) iff (s_eventually a));
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117 | assert property ((s_eventually a) iff (s_eventually a));
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| ^~~~~~
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| ^~~~~~
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%Error: Exiting due to
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%Error: Exiting due to
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@ -1,14 +1,15 @@
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%Error-UNSUPPORTED: t/t_property_s_eventually_unsup.v:14:20: Unsupported: Unclocked assertion
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%Error: t/t_property_s_eventually_unsup.v:14:20: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
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: ... note: In instance 't'
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: ... note: In instance 't'
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14 | assert property (s_eventually ##1 1);
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14 | assert property (s_eventually ##1 1);
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| ^~~~~~~~~~~~
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| ^~~~~~~~~~~~
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... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
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... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
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%Error-UNSUPPORTED: t/t_property_s_eventually_unsup.v:14:3: Unsupported: Unclocked assertion
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%Error: t/t_property_s_eventually_unsup.v:14:3: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
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: ... note: In instance 't'
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: ... note: In instance 't'
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14 | assert property (s_eventually ##1 1);
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14 | assert property (s_eventually ##1 1);
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| ^~~~~~
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| ^~~~~~
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%Error-UNSUPPORTED: t/t_property_s_eventually_unsup.v:15:35: Unsupported: cycle delay in s_eventually
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%Error-UNSUPPORTED: t/t_property_s_eventually_unsup.v:15:35: Unsupported: cycle delay in s_eventually
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: ... note: In instance 't'
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: ... note: In instance 't'
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15 | assert property (@(negedge clk) s_eventually ##1 1);
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15 | assert property (@(negedge clk) s_eventually ##1 1);
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| ^~~~~~~~~~~~
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| ^~~~~~~~~~~~
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... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
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%Error: Exiting due to
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%Error: Exiting due to
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@ -7,11 +7,10 @@
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: ... note: In instance 'main'
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: ... note: In instance 'main'
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51 | initial p0 : assert property ((##1 1) or(##2 1) |-> x == 1);
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51 | initial p0 : assert property ((##1 1) or(##2 1) |-> x == 1);
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| ^~
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| ^~
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%Error-UNSUPPORTED: t/t_sequence_first_match_unsup.v:51:16: Unsupported: Unclocked assertion
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%Error: t/t_sequence_first_match_unsup.v:51:16: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
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: ... note: In instance 'main'
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: ... note: In instance 'main'
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51 | initial p0 : assert property ((##1 1) or(##2 1) |-> x == 1);
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51 | initial p0 : assert property ((##1 1) or(##2 1) |-> x == 1);
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| ^~~~~~
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| ^~~~~~
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... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
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%Error: t/t_sequence_first_match_unsup.v:54:47: Usage of cycle delays requires default clocking (IEEE 1800-2023 14.11)
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%Error: t/t_sequence_first_match_unsup.v:54:47: Usage of cycle delays requires default clocking (IEEE 1800-2023 14.11)
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: ... note: In instance 'main'
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: ... note: In instance 'main'
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54 | initial p1 : assert property (first_match ((##1 1) or(##2 1)) |-> x == 1);
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54 | initial p1 : assert property (first_match ((##1 1) or(##2 1)) |-> x == 1);
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@ -20,24 +19,24 @@
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: ... note: In instance 'main'
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: ... note: In instance 'main'
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54 | initial p1 : assert property (first_match ((##1 1) or(##2 1)) |-> x == 1);
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54 | initial p1 : assert property (first_match ((##1 1) or(##2 1)) |-> x == 1);
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| ^~
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| ^~
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%Error-UNSUPPORTED: t/t_sequence_first_match_unsup.v:54:16: Unsupported: Unclocked assertion
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%Error: t/t_sequence_first_match_unsup.v:54:16: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
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: ... note: In instance 'main'
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: ... note: In instance 'main'
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54 | initial p1 : assert property (first_match ((##1 1) or(##2 1)) |-> x == 1);
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54 | initial p1 : assert property (first_match ((##1 1) or(##2 1)) |-> x == 1);
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| ^~~~~~
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| ^~~~~~
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%Error: t/t_sequence_first_match_unsup.v:57:38: Usage of cycle delays requires default clocking (IEEE 1800-2023 14.11)
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%Error: t/t_sequence_first_match_unsup.v:57:38: Usage of cycle delays requires default clocking (IEEE 1800-2023 14.11)
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: ... note: In instance 'main'
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: ... note: In instance 'main'
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57 | initial p2 : assert property (1 or ##1 1 |-> x == 0);
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57 | initial p2 : assert property (1 or ##1 1 |-> x == 0);
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| ^~
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| ^~
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%Error-UNSUPPORTED: t/t_sequence_first_match_unsup.v:57:16: Unsupported: Unclocked assertion
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%Error: t/t_sequence_first_match_unsup.v:57:16: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
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: ... note: In instance 'main'
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: ... note: In instance 'main'
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57 | initial p2 : assert property (1 or ##1 1 |-> x == 0);
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57 | initial p2 : assert property (1 or ##1 1 |-> x == 0);
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| ^~~~~~
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| ^~~~~~
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%Error: t/t_sequence_first_match_unsup.v:60:51: Usage of cycle delays requires default clocking (IEEE 1800-2023 14.11)
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%Error: t/t_sequence_first_match_unsup.v:60:51: Usage of cycle delays requires default clocking (IEEE 1800-2023 14.11)
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: ... note: In instance 'main'
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: ... note: In instance 'main'
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60 | initial p3 : assert property (first_match (1 or ##1 1) |-> x == 0);
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60 | initial p3 : assert property (first_match (1 or ##1 1) |-> x == 0);
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| ^~
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| ^~
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%Error-UNSUPPORTED: t/t_sequence_first_match_unsup.v:60:16: Unsupported: Unclocked assertion
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%Error: t/t_sequence_first_match_unsup.v:60:16: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
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: ... note: In instance 'main'
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: ... note: In instance 'main'
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60 | initial p3 : assert property (first_match (1 or ##1 1) |-> x == 0);
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60 | initial p3 : assert property (first_match (1 or ##1 1) |-> x == 0);
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| ^~~~~~
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| ^~~~~~
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%Error: Internal Error: t/t_sequence_first_match_unsup.v:51:34: ../V3Ast.cpp:#: AstSExpr must have non-nullptr delayp()
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%Error: Internal Error: t/t_sequence_first_match_unsup.v:51:34: ../V3Ast.cpp:#: AstSExpr must have non-nullptr delayp()
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