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Report unclocked concurrent assertion as an error

This commit is contained in:
Yilou Wang 2026-06-16 22:51:52 +02:00
parent d84af81a11
commit d9d26fa54f
7 changed files with 75 additions and 28 deletions
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3
src/V3AssertPre.cpp
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@ -91,7 +91,8 @@ private:
fromAlways = true;
}
if (!senip) {
nodep->v3warn(E_UNSUPPORTED, "Unsupported: Unclocked assertion");
nodep->v3error("Concurrent assertion has no clock; provide a clocking event, a default"
" clocking, or a clocked procedural context (IEEE 1800-2023 16.16)");
newp = new AstSenTree{nodep->fileline(), nullptr};
} else {
if (cassertp && fromAlways) cassertp->senFromAlways(true);

18
test_regress/t/t_assert_unclocked_bad.out Normal file
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@ -0,0 +1,18 @@
%Error: t/t_assert_unclocked_bad.v:9:3: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
: ... note: In instance 't'
9 | assert property (a);
| ^~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_assert_unclocked_bad.v:10:22: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
: ... note: In instance 't'
10 | assert property (a |=> b);
| ^~~
%Error: t/t_assert_unclocked_bad.v:10:3: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
: ... note: In instance 't'
10 | assert property (a |=> b);
| ^~~~~~
%Error: t/t_assert_unclocked_bad.v:11:3: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
: ... note: In instance 't'
11 | cover property (a);
| ^~~~~
%Error: Exiting due to

16
test_regress/t/t_assert_unclocked_bad.py Executable file
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@ -0,0 +1,16 @@
#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of either the GNU Lesser General Public License Version 3
# or the Perl Artistic License Version 2.0.
# SPDX-FileCopyrightText: 2026 Wilson Snyder
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap
test.scenarios('vlt')
test.lint(expect_filename=test.golden_filename, fails=True)
test.passes()

12
test_regress/t/t_assert_unclocked_bad.v Normal file
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@ -0,0 +1,12 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain.
// SPDX-FileCopyrightText: 2026 PlanV GmbH
// SPDX-License-Identifier: CC0-1.0
module t;
logic a, b;
assert property (a);
assert property (a |=> b);
cover property (a);
endmodule

26
test_regress/t/t_property_pexpr_unsup.out
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@ -1,26 +1,26 @@
%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:115:21: Unsupported: Unclocked assertion
: ... note: In instance 't'
%Error: t/t_property_pexpr_unsup.v:115:21: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
: ... note: In instance 't'
115 | assert property ((s_eventually a) implies (s_eventually a));
| ^~~~~~~~~~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:115:46: Unsupported: Unclocked assertion
: ... note: In instance 't'
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_property_pexpr_unsup.v:115:46: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
: ... note: In instance 't'
115 | assert property ((s_eventually a) implies (s_eventually a));
| ^~~~~~~~~~~~
%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:115:3: Unsupported: Unclocked assertion
: ... note: In instance 't'
%Error: t/t_property_pexpr_unsup.v:115:3: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
: ... note: In instance 't'
115 | assert property ((s_eventually a) implies (s_eventually a));
| ^~~~~~
%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:117:21: Unsupported: Unclocked assertion
: ... note: In instance 't'
%Error: t/t_property_pexpr_unsup.v:117:21: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
: ... note: In instance 't'
117 | assert property ((s_eventually a) iff (s_eventually a));
| ^~~~~~~~~~~~
%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:117:42: Unsupported: Unclocked assertion
: ... note: In instance 't'
%Error: t/t_property_pexpr_unsup.v:117:42: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
: ... note: In instance 't'
117 | assert property ((s_eventually a) iff (s_eventually a));
| ^~~~~~~~~~~~
%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:117:3: Unsupported: Unclocked assertion
: ... note: In instance 't'
%Error: t/t_property_pexpr_unsup.v:117:3: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
: ... note: In instance 't'
117 | assert property ((s_eventually a) iff (s_eventually a));
| ^~~~~~
%Error: Exiting due to

11
test_regress/t/t_property_s_eventually_unsup.out
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@ -1,14 +1,15 @@
%Error-UNSUPPORTED: t/t_property_s_eventually_unsup.v:14:20: Unsupported: Unclocked assertion
: ... note: In instance 't'
%Error: t/t_property_s_eventually_unsup.v:14:20: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
: ... note: In instance 't'
14 | assert property (s_eventually ##1 1);
| ^~~~~~~~~~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error-UNSUPPORTED: t/t_property_s_eventually_unsup.v:14:3: Unsupported: Unclocked assertion
: ... note: In instance 't'
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_property_s_eventually_unsup.v:14:3: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
: ... note: In instance 't'
14 | assert property (s_eventually ##1 1);
| ^~~~~~
%Error-UNSUPPORTED: t/t_property_s_eventually_unsup.v:15:35: Unsupported: cycle delay in s_eventually
: ... note: In instance 't'
15 | assert property (@(negedge clk) s_eventually ##1 1);
| ^~~~~~~~~~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Exiting due to

17
test_regress/t/t_sequence_first_match_unsup.out
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@ -7,11 +7,10 @@
: ... note: In instance 'main'
51 | initial p0 : assert property ((##1 1) or(##2 1) |-> x == 1);
| ^~
%Error-UNSUPPORTED: t/t_sequence_first_match_unsup.v:51:16: Unsupported: Unclocked assertion
: ... note: In instance 'main'
%Error: t/t_sequence_first_match_unsup.v:51:16: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
: ... note: In instance 'main'
51 | initial p0 : assert property ((##1 1) or(##2 1) |-> x == 1);
| ^~~~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: t/t_sequence_first_match_unsup.v:54:47: Usage of cycle delays requires default clocking (IEEE 1800-2023 14.11)
: ... note: In instance 'main'
54 | initial p1 : assert property (first_match ((##1 1) or(##2 1)) |-> x == 1);
@ -20,24 +19,24 @@
: ... note: In instance 'main'
54 | initial p1 : assert property (first_match ((##1 1) or(##2 1)) |-> x == 1);
| ^~
%Error-UNSUPPORTED: t/t_sequence_first_match_unsup.v:54:16: Unsupported: Unclocked assertion
: ... note: In instance 'main'
%Error: t/t_sequence_first_match_unsup.v:54:16: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
: ... note: In instance 'main'
54 | initial p1 : assert property (first_match ((##1 1) or(##2 1)) |-> x == 1);
| ^~~~~~
%Error: t/t_sequence_first_match_unsup.v:57:38: Usage of cycle delays requires default clocking (IEEE 1800-2023 14.11)
: ... note: In instance 'main'
57 | initial p2 : assert property (1 or ##1 1 |-> x == 0);
| ^~
%Error-UNSUPPORTED: t/t_sequence_first_match_unsup.v:57:16: Unsupported: Unclocked assertion
: ... note: In instance 'main'
%Error: t/t_sequence_first_match_unsup.v:57:16: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
: ... note: In instance 'main'
57 | initial p2 : assert property (1 or ##1 1 |-> x == 0);
| ^~~~~~
%Error: t/t_sequence_first_match_unsup.v:60:51: Usage of cycle delays requires default clocking (IEEE 1800-2023 14.11)
: ... note: In instance 'main'
60 | initial p3 : assert property (first_match (1 or ##1 1) |-> x == 0);
| ^~
%Error-UNSUPPORTED: t/t_sequence_first_match_unsup.v:60:16: Unsupported: Unclocked assertion
: ... note: In instance 'main'
%Error: t/t_sequence_first_match_unsup.v:60:16: Concurrent assertion has no clock; provide a clocking event, a default clocking, or a clocked procedural context (IEEE 1800-2023 16.16)
: ... note: In instance 'main'
60 | initial p3 : assert property (first_match (1 or ##1 1) |-> x == 0);
| ^~~~~~
%Error: Internal Error: t/t_sequence_first_match_unsup.v:51:34: ../V3Ast.cpp:#: AstSExpr must have non-nullptr delayp()