Whitespace fixes

Signed-off-by: Matthew Ballance <matt.ballance@gmail.com>

docs/guide/simulating.rst

@@ -217,7 +217,7 @@ Covergroup Coverage
 
 With :vlopt:`--coverage` or :vlopt:`--coverage-user`, Verilator will
 translate covergroup coverage points the user has inserted manually in
-SystemVerilog code into the Verilated model. Verilator supports 
+SystemVerilog code into the Verilated model. Verilator supports
 coverpoints with value and transition bins, and cross points.
 
 .. code-block:: sv
@@ -251,7 +251,7 @@ coverpoints with value and transition bins, and cross points.
 Supported Features
 ^^^^^^^^^^^^^^^^^^
 * Coverpoints on integral expressions with value, range, wildcard, and transition bins
-* Conditional coverpoint sampling (iff) 
+* Conditional coverpoint sampling (iff)
 * Explicit and clocked sampling, with sample-function parameters
 * at_least and auto_bin_max options on covergroups and coverpoints
 * Cross points with auto-bins
@@ -262,7 +262,7 @@ Unsupported Features
 * Coverpoints on real (floating-point) expressions
 * Coverpoint bin filtering (with)
 * Coverpoint bin conditional sampling (iff)
-* Transition bins with repetition operators ([\*N], [->N], [=N]) 
+* Transition bins with repetition operators ([\*N], [->N], [=N])
 * Explicitly-typed coverpoints
 * Block-event sampling
 * Covergroup inheritance (extends)

src/V3LinkParse.cpp

@@ -1152,7 +1152,7 @@ class LinkParseVisitor final : public VNVisitor {
 
     void visit(AstCovergroup* nodep) override {
         // If we're already inside a covergroup class, this is the sentinel AstCovergroup
-        // node carrying the clocking event for V3Covergroup — don't re-transform it.
+        // node carrying the clocking event for V3Covergroup - don't re-transform it.
         if (m_modp && VN_IS(m_modp, Class) && VN_CAST(m_modp, Class)->isCovergroup()) return;
 
         // Transform raw parse-time AstCovergroup into a fully-formed AstClass