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https://github.com/verilator/verilator.git
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Generate AstNode accessors via astgen
Introduce the @astgen directives parsed by astgen, currently used for the generation child node (operand) accessors. Please see the updated internal documentation for details.
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+5
-5
@@ -76,7 +76,7 @@ void V3LinkLevel::modSortByLevel() {
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UINFO(9, "modSortByLevel() sorted\n"); // Comment required for gcc4.6.3 / bug666
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for (AstNodeModule* nodep : mods) nodep->unlinkFrBack();
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UASSERT_OBJ(!v3Global.rootp()->modulesp(), v3Global.rootp(), "Unlink didn't work");
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for (AstNodeModule* nodep : mods) v3Global.rootp()->addModulep(nodep);
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for (AstNodeModule* nodep : mods) v3Global.rootp()->addModulesp(nodep);
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UINFO(9, "modSortByLevel() done\n"); // Comment required for gcc4.6.3 / bug666
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V3Global::dumpCheckGlobalTree("cells", false, v3Global.opt.dumpTreeLevel(__FILE__) >= 3);
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}
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@@ -154,7 +154,7 @@ void V3LinkLevel::wrapTop(AstNetlist* rootp) {
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newmodp->modPublic(true);
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newmodp->protect(false);
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newmodp->timeunit(oldmodp->timeunit());
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rootp->addModulep(newmodp);
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rootp->addModulesp(newmodp);
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// TODO the module creation above could be done after linkcells, but
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// the rest must be done after data type resolution
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@@ -170,7 +170,7 @@ void V3LinkLevel::wrapTop(AstNetlist* rootp) {
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// with module names/"v"
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modp->name(), modp->name(), nullptr, nullptr, nullptr);
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cellp->modp(modp);
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newmodp->addStmtp(cellp);
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newmodp->addStmtsp(cellp);
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}
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}
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@@ -213,7 +213,7 @@ void V3LinkLevel::wrapTopCell(AstNetlist* rootp) {
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(!v3Global.opt.l2Name().empty() ? v3Global.opt.l2Name() : oldmodp->name()),
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oldmodp->name(), nullptr, nullptr, nullptr);
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cellp->modp(oldmodp);
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newmodp->addStmtp(cellp);
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newmodp->addStmtsp(cellp);
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// Add pins
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for (AstNode* subnodep = oldmodp->stmtsp(); subnodep; subnodep = subnodep->nextp()) {
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@@ -229,7 +229,7 @@ void V3LinkLevel::wrapTopCell(AstNetlist* rootp) {
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AstVar* const varp = oldvarp->cloneTree(false);
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varp->name(name);
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varp->protect(false);
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newmodp->addStmtp(varp);
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newmodp->addStmtsp(varp);
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varp->sigPublic(true); // User needs to be able to get to it...
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if (oldvarp->isIO()) {
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oldvarp->primaryIO(false);
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