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Add lint check for bad delay locations.
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+12
-8
@@ -102,7 +102,7 @@ private:
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bool m_doShort; // Remove expressions that short circuit
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bool m_doV; // Verilog, not C++ conversion
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bool m_doGenerate; // Postpone width checking inside generate
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bool m_hasJumpGo; // JumpGo under this while
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bool m_hasJumpDelay; // JumpGo or Delay under this while
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AstNodeModule* m_modp; // Current module
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AstArraySel* m_selp; // Current select
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AstNode* m_scopep; // Current scope
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@@ -2114,11 +2114,11 @@ private:
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iterateChildren(nodep);
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}
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virtual void visit(AstWhile* nodep) VL_OVERRIDE {
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bool oldHasJumpGo = m_hasJumpGo;
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m_hasJumpGo = false;
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bool oldHasJumpDelay = m_hasJumpDelay;
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m_hasJumpDelay = false;
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{ iterateChildren(nodep); }
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bool thisWhileHasJumpGo = m_hasJumpGo;
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m_hasJumpGo = thisWhileHasJumpGo || oldHasJumpGo;
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bool thisWhileHasJumpDelay = m_hasJumpDelay;
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m_hasJumpDelay = thisWhileHasJumpDelay || oldHasJumpDelay;
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if (m_doNConst) {
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if (nodep->condp()->isZero()) {
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UINFO(4, "WHILE(0) => nop " << nodep << endl);
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@@ -2129,7 +2129,7 @@ private:
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}
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VL_DO_DANGLING(nodep->deleteTree(), nodep);
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} else if (nodep->condp()->isNeqZero()) {
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if (!thisWhileHasJumpGo) {
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if (!thisWhileHasJumpDelay) {
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nodep->v3warn(INFINITELOOP, "Infinite loop (condition always true)");
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nodep->fileline()->modifyWarnOff(V3ErrorCode::INFINITELOOP,
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true); // Complain just once
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@@ -2161,9 +2161,13 @@ private:
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//-----
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// Jump elimination
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virtual void visit(AstDelay* nodep) VL_OVERRIDE {
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iterateChildren(nodep);
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m_hasJumpDelay = true;
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}
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virtual void visit(AstJumpGo* nodep) VL_OVERRIDE {
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iterateChildren(nodep);
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m_hasJumpGo = true;
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m_hasJumpDelay = true;
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if (m_doExpensive) {
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// If last statement in a jump label we have JumpLabel(...., JumpGo)
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// Often caused by "return" in a Verilog function. The Go is pointless, remove.
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@@ -2566,7 +2570,7 @@ public:
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m_doShort = true; // Presently always done
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m_doV = false;
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m_doGenerate = false; // Inside generate conditionals
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m_hasJumpGo = false;
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m_hasJumpDelay = false;
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m_warn = false;
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m_wremove = true; // Overridden in visitors
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m_modp = NULL;
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