Fix $sformat with array arguments (#5330).
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@ -57,6 +57,7 @@ Verilator 5.027 devel
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* Fix Python3 path discovery in make flows to avoid mixing system and user python interpreters (#5307) [Markus Krause]
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* Fix Python3 path discovery in make flows to avoid mixing system and user python interpreters (#5307) [Markus Krause]
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* Fix make flows to pass PYTHON3 (like PERL) (#5307) (#5308). [Markus Krause]
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* Fix make flows to pass PYTHON3 (like PERL) (#5307) (#5308). [Markus Krause]
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* Fix stringify in nested preprocessor macros (#5323). [Krzysztof Bieganski, Antmicro Ltd.]
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* Fix stringify in nested preprocessor macros (#5323). [Krzysztof Bieganski, Antmicro Ltd.]
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* Fix $sformat with array arguments (#5330). [Abe Jordan]
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* Fix ==? and !=? with X values.
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* Fix ==? and !=? with X values.
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* Fix CPU time being zero.
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* Fix CPU time being zero.
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* Fix inline function ref port persistence.
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* Fix inline function ref port persistence.
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@ -1203,7 +1203,7 @@ class WidthVisitor final : public VNVisitor {
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userIterateAndNext(nodep->attrp(), WidthVP{SELF, BOTH}.p());
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userIterateAndNext(nodep->attrp(), WidthVP{SELF, BOTH}.p());
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AstNode* const selp = V3Width::widthSelNoIterEdit(nodep);
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AstNode* const selp = V3Width::widthSelNoIterEdit(nodep);
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if (selp != nodep) {
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if (selp != nodep) {
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nodep = nullptr;
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VL_DANGLING(nodep);
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userIterate(selp, m_vup);
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userIterate(selp, m_vup);
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return;
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return;
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}
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}
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@ -5051,6 +5051,11 @@ class WidthVisitor final : public VNVisitor {
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}
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}
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}
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}
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void visit(AstSFormat* nodep) override {
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assertAtStatement(nodep);
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userIterateAndNext(nodep->fmtp(), WidthVP{SELF, BOTH}.p());
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userIterateAndNext(nodep->lhsp(), WidthVP{SELF, BOTH}.p());
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}
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void visit(AstSFormatF* nodep) override {
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void visit(AstSFormatF* nodep) override {
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// Excludes NodeDisplay, see below
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// Excludes NodeDisplay, see below
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if (m_vup && !m_vup->prelim()) return; // Can be called as statement or function
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if (m_vup && !m_vup->prelim()) return; // Can be called as statement or function
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@ -17,6 +17,7 @@ module t;
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reg [48*8:1] str2;
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reg [48*8:1] str2;
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string str3;
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string str3;
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reg [39:0] instruction_str [1:0];
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real r;
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real r;
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@ -87,6 +88,11 @@ module t;
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`ifdef TEST_VERBOSE $display("str3=%0s", str3); `endif
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`ifdef TEST_VERBOSE $display("str3=%0s", str3); `endif
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if (str3 != "foo") $stop;
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if (str3 != "foo") $stop;
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$sformat(instruction_str[0], "%s", "Hello");
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$sformat(instruction_str[1], "%s", "World");
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if (instruction_str[0] != "Hello") $stop;
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if (instruction_str[1] != "World") $stop;
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$write("*-* All Finished *-*\n");
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$write("*-* All Finished *-*\n");
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$finish;
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$finish;
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end
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end
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