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Clock domain crossing checks
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@@ -122,6 +122,12 @@ private:
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nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
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}
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virtual void visit(AstUdpTable* nodep, AstNUser*) {
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if (!v3Global.opt.bboxUnsup()) {
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nodep->v3error("Unsupported: Verilog 1995 UDP Tables. Use --bbox-unsup to ignore tables.");
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}
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}
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// Save some time
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virtual void visit(AstNodeAssign*, AstNUser*) {}
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virtual void visit(AstAlways*, AstNUser*) {}
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