Clock domain crossing checks

This commit is contained in:
Wilson Snyder
2010-01-07 16:41:19 -05:00
parent a03a540156
commit bf860b21d7
17 changed files with 907 additions and 32 deletions
+6
View File
@@ -122,6 +122,12 @@ private:
nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
}
virtual void visit(AstUdpTable* nodep, AstNUser*) {
if (!v3Global.opt.bboxUnsup()) {
nodep->v3error("Unsupported: Verilog 1995 UDP Tables. Use --bbox-unsup to ignore tables.");
}
}
// Save some time
virtual void visit(AstNodeAssign*, AstNUser*) {}
virtual void visit(AstAlways*, AstNUser*) {}