Fix randomize local after parameters applied (#6371).

Changes

@@ -16,6 +16,7 @@ Verilator 5.041 devel
 * Fix while loop hang on timing-delayed assignment (#6343) (#6354). [Krzysztof Bieganski, Antmicro Ltd.]
 * Fix V3Hash MacOS ambiguity (#6350). [Lan Zongwei]
 * Fix cmake APPLE variable (#6351). [Lan Zongwei]
+* Fix randomize local after parameters applied (#6371). [Alex Solomatnikov]
 * Fix package imports not found after parameters applied (#6373). [Alex Solomatnikov]
 
 

src/V3LinkDot.cpp

@@ -3785,10 +3785,6 @@ class LinkDotResolveVisitor final : public VNVisitor {
                 m_statep->resolveClassOrPackage(m_ds.m_dotSymp, nodep, m_ds.m_dotPos != DP_PACKAGE,
                                                 false, ":: reference");
             }
-            UASSERT_OBJ(m_statep->forPrimary()
-                            || VN_IS(nodep->classOrPackageNodep(), ParamTypeDType)
-                            || nodep->classOrPackageSkipp(),
-                        nodep, "ClassRef has unlinked class");
 
             // ClassRef's have pins, so track
             if (nodep->classOrPackageSkipp()) {
@@ -3796,6 +3792,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
             } else if (nodep->name() != "local::") {
                 return;
             }
+
             AstClass* const refClassp = VN_CAST(nodep->classOrPackageSkipp(), Class);
             // Make sure any extends() are properly imported within referenced class
             if (refClassp && !m_statep->forPrimary()) classExtendImport(refClassp);

test_regress/t/t_randomize_local_param.py

@@ -0,0 +1,16 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('linter')
+
+test.lint()
+
+test.passes()

test_regress/t/t_randomize_local_param.v

@@ -0,0 +1,34 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+package Pkg;
+  virtual class uvm_sequence #(
+      type REQ = int
+  );
+    REQ m_req;
+  endclass
+endpackage
+
+package SubPkg;
+  import Pkg::*;
+  class s_trgt_txn;
+    int m_txn_val;
+  endclass
+  class p_mem_seq extends uvm_sequence #(s_trgt_txn);
+    rand bit m_wr_flag;
+    virtual task body();
+      if (0 !== (m_req.randomize() with {local::m_wr_flag;})) begin
+      end
+    endtask
+  endclass
+endpackage
+
+module t;
+  initial begin
+    $write("*-* All Finished *-*\n");
+    $finish;
+  end
+endmodule