Fix foreach and pre/post increment in functions (#3613).
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Changes
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@ -36,9 +36,10 @@ Verilator 5.001 devel
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* Support linting for top module interfaces (#3635). [Kanad Kanhere]
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* Support linting for top module interfaces (#3635). [Kanad Kanhere]
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* Add --dump-tree-dot to enable dumping Ast Tree .dot files (#3636). [Marcel Chang]
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* Add --dump-tree-dot to enable dumping Ast Tree .dot files (#3636). [Marcel Chang]
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* Add error on real edge event control.
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* Add error on real edge event control.
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* Fix LSB error on --hierarchical submodules (#3539). [danbone]
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* Fix foreach and pre/post increment in functions (#3613). [Nandu Raj]
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* Fix linker errors in user-facing timing functions (#3657). [Krzysztof Bieganski, Antmicro Ltd]
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* Fix linker errors in user-facing timing functions (#3657). [Krzysztof Bieganski, Antmicro Ltd]
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* Fix null access on optimized-out fork statements (#3658). [Krzysztof Bieganski, Antmicro Ltd]
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* Fix null access on optimized-out fork statements (#3658). [Krzysztof Bieganski, Antmicro Ltd]
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* Fix LSB error on --hierarchical submodules (#3539). [danbone]
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Verilator 4.228 2022-10-01
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Verilator 4.228 2022-10-01
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@ -60,6 +60,7 @@ private:
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};
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};
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// STATE
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// STATE
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AstNodeFTask* m_ftaskp = nullptr; // Function or task we're inside
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int m_modIncrementsNum = 0; // Var name counter
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int m_modIncrementsNum = 0; // Var name counter
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InsertMode m_insMode = IM_BEFORE; // How to insert
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InsertMode m_insMode = IM_BEFORE; // How to insert
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AstNode* m_insStmtp = nullptr; // Where to insert statement
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AstNode* m_insStmtp = nullptr; // Where to insert statement
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@ -94,6 +95,11 @@ private:
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m_modIncrementsNum = 0;
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m_modIncrementsNum = 0;
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iterateChildren(nodep);
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iterateChildren(nodep);
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}
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}
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void visit(AstNodeFTask* nodep) override {
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VL_RESTORER(m_ftaskp);
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m_ftaskp = nodep;
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iterateChildren(nodep);
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}
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void visit(AstWhile* nodep) override {
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void visit(AstWhile* nodep) override {
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// Special, as statements need to be put in different places
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// Special, as statements need to be put in different places
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// Preconditions insert first just before themselves (the normal
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// Preconditions insert first just before themselves (the normal
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@ -241,6 +247,7 @@ private:
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const string name = string("__Vincrement") + cvtToStr(++m_modIncrementsNum);
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const string name = string("__Vincrement") + cvtToStr(++m_modIncrementsNum);
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AstVar* const varp = new AstVar(fl, VVarType::BLOCKTEMP, name, VFlagChildDType(),
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AstVar* const varp = new AstVar(fl, VVarType::BLOCKTEMP, name, VFlagChildDType(),
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varrefp->varp()->subDTypep()->cloneTree(true));
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varrefp->varp()->subDTypep()->cloneTree(true));
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if (m_ftaskp) varp->funcLocal(true);
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// Declare the variable
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// Declare the variable
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insertBeforeStmt(nodep, varp);
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insertBeforeStmt(nodep, varp);
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@ -301,9 +301,9 @@ private:
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}
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}
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}
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}
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void visit(AstNodeFTask* nodep) override {
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void visit(AstNodeFTask* nodep) override {
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VL_RESTORER(m_ftaskp);
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m_ftaskp = nodep;
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m_ftaskp = nodep;
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iterateChildren(nodep);
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iterateChildren(nodep);
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m_ftaskp = nullptr;
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}
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}
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void visit(AstNodeFTaskRef* nodep) override {
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void visit(AstNodeFTaskRef* nodep) override {
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AstNode* pinp = nodep->pinsp();
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AstNode* pinp = nodep->pinsp();
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@ -175,7 +175,7 @@ private:
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// Find all var->varscope mappings, for later cleanup
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// Find all var->varscope mappings, for later cleanup
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for (AstNode* stmtp = nodep->varsp(); stmtp; stmtp = stmtp->nextp()) {
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for (AstNode* stmtp = nodep->varsp(); stmtp; stmtp = stmtp->nextp()) {
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if (AstVarScope* const vscp = VN_CAST(stmtp, VarScope)) {
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if (AstVarScope* const vscp = VN_CAST(stmtp, VarScope)) {
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if (vscp->varp()->isFuncLocal()) {
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if (vscp->varp()->isFuncLocal() || vscp->varp()->isUsedLoopIdx()) {
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UINFO(9, " funcvsc " << vscp << endl);
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UINFO(9, " funcvsc " << vscp << endl);
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m_varToScopeMap.insert(
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m_varToScopeMap.insert(
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std::make_pair(std::make_pair(nodep, vscp->varp()), vscp));
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std::make_pair(std::make_pair(nodep, vscp->varp()), vscp));
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@ -16,18 +16,30 @@ module t (/*AUTOARG*/
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integer cyc = 0;
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integer cyc = 0;
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int imap[int];
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// associative array of an associative array
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// associative array of an associative array
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logic [31:0] a [logic [31:0]][logic [63:0]];
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logic [31:0] a [logic [31:0]][logic [63:0]];
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task disp();
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int i = 60;
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imap[i++] = 600;
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imap[i++] = 601;
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foreach (imap[k]) $display("imap[%0d] = %0d", k, imap[k]);
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endtask
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always @ (posedge clk) begin
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always @ (posedge clk) begin
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cyc <= cyc + 1;
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cyc <= cyc + 1;
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if (cyc == 1) begin
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if (cyc == 1) begin
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a[5][8] = 8;
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a[5][8] = 8;
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a[5][9] = 9;
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a[5][9] = 9;
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imap[10] = 100;
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imap[11] = 101;
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end
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end
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else if (cyc == 2) begin
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else if (cyc == 2) begin
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`checkh(a[5][8], 8);
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`checkh(a[5][8], 8);
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`checkh(a[5][9], 9);
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`checkh(a[5][9], 9);
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disp();
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$write("*-* All Finished *-*\n");
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$write("*-* All Finished *-*\n");
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$finish;
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$finish;
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end
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end
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