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@ -2279,6 +2279,9 @@ see below and the test_c/sim_main.cpp file of the distribution.
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You also need to compile SpTraceVcdC.cpp and add it to your link. This is
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You also need to compile SpTraceVcdC.cpp and add it to your link. This is
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done for you if using the Verilator --exe flag.
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done for you if using the Verilator --exe flag.
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Note you can also call ->trace on multiple Verilated objects with the same
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trace file if you want all data to land in the same output file.
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#include "SpTraceVcdC.cpp"
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#include "SpTraceVcdC.cpp"
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...
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...
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int main(int argc, char **argv, char **env) {
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int main(int argc, char **argv, char **env) {
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@ -2309,12 +2312,18 @@ Alternatively you may use the C++ trace mechanism described in the previous
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question, however the timescale and timeprecision will not inherited from
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question, however the timescale and timeprecision will not inherited from
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your SystemC settings.
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your SystemC settings.
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You'll then need to compile in Sp.cpp, which includes SpTraceVcd.cpp among
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other things.
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Note you can also call ->trace on multiple Verilated objects with the same
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trace file if you want all data to land in the same output file.
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#include "SpTraceVcd.cpp"
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#include "SpTraceVcd.cpp"
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...
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...
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int main(int argc, char **argv, char **env) {
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int main(int argc, char **argv, char **env) {
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...
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...
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Verilated::traceEverOn(true);
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Verilated::traceEverOn(true);
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SpTraceVcdFile* tfp = new SpTraceVcdFile;
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SpTraceFile* tfp = new SpTraceFile;
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topp->trace (tfp, 99);
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topp->trace (tfp, 99);
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tfp->open ("obj_dir/t_trace_ena_cc/simx.vcd");
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tfp->open ("obj_dir/t_trace_ena_cc/simx.vcd");
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...
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...
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@ -7,7 +7,6 @@ module t (/*AUTOARG*/);
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reg signed [2:0] negcnt;
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reg signed [2:0] negcnt;
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integer times;
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integer times;
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integer repeats;
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initial begin
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initial begin
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times = 0;
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times = 0;
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repeat (1) begin
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repeat (1) begin
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@ -23,7 +22,6 @@ module t (/*AUTOARG*/);
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end
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end
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if (times != 10) $stop;
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if (times != 10) $stop;
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//
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//
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repeats = 0;
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forever begin
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forever begin
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$write("*-* All Finished *-*\n");
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$write("*-* All Finished *-*\n");
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$finish;
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$finish;
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