Tests: Avoid verilated.v include in most tests

This commit is contained in:
Wilson Snyder
2024-02-27 18:08:37 -05:00
parent b68a696859
commit a69cb9b044
20 changed files with 151 additions and 25 deletions
+6
View File
@@ -710,6 +710,12 @@ class TristateVisitor final : public TristateBaseVisitor {
++m_statTriSigs;
m_tgraph.didProcess(invarp);
const AstBasicDType* const basicp = VN_CAST(invarp->dtypep()->skipRefp(), BasicDType);
if (!basicp || basicp->isOpaque())
invarp->v3warn(E_UNSUPPORTED,
"Unsupported: Inout/tristate with non-bit/logic data type: "
<< invarp->dtypep()->prettyTypeName());
// If the lhs var is a port, then we need to create ports for
// the output (__out) and output enable (__en) signals. The
// original port gets converted to an input. Don't tristate expand