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Tests: Avoid verilated.v include in most tests
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@@ -710,6 +710,12 @@ class TristateVisitor final : public TristateBaseVisitor {
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++m_statTriSigs;
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m_tgraph.didProcess(invarp);
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const AstBasicDType* const basicp = VN_CAST(invarp->dtypep()->skipRefp(), BasicDType);
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if (!basicp || basicp->isOpaque())
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invarp->v3warn(E_UNSUPPORTED,
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"Unsupported: Inout/tristate with non-bit/logic data type: "
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<< invarp->dtypep()->prettyTypeName());
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// If the lhs var is a port, then we need to create ports for
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// the output (__out) and output enable (__en) signals. The
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// original port gets converted to an input. Don't tristate expand
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