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Use vluint8/16/64 in source code
git-svn-id: file://localhost/svn/verilator/trunk/verilator@789 77ca24e4-aefa-0310-84f0-b9a241c72d87
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@@ -1279,7 +1279,7 @@ void EmitCImp::emitWrapEval(AstModule* modp) {
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void EmitCStmts::emitVarList(AstNode* firstp, EisWhich which, const string& prefixIfImp) {
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// Put out a list of signal declarations
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// in order of 0:clocks, 1:uint8, 2:uint16, 4:uint32, 5:uint64, 6:wide, 7:arrays
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// in order of 0:clocks, 1:vluint8, 2:vluint16, 4:vluint32, 5:vluint64, 6:wide, 7:arrays
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// This aids cache packing and locality
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// Largest->smallest reduces the number of pad variables.
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// But for now, Smallest->largest makes it more likely a small offset will allow access to the signal.
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