Tests: Add t_uvm_dpi not forceable check

test_regress/t/t_uvm_dpi.v

@@ -41,6 +41,8 @@ module t;
 
   // To cover testing cases, this has non-zero LSB/LO
   logic [31+8:8] exposed  /*verilator public*/;
+  logic not_exposed;
+  logic exposed_not_forceable;
 
   uvm_hdl_data_t lval;
 
@@ -83,6 +85,7 @@ module t;
 
     //===== Hier
 `ifdef VERILATOR
+    $c("Verilated::lastContextp()->fatalOnVpiError(false);");
 `ifdef TEST_VERBOSE
     $c("Verilated::scopesDump();");
 `endif
@@ -103,12 +106,6 @@ module t;
     `checkh(i, 1);
     `checkh(lval[31:0], exposed);
 
-    lval = '0;
-    $display("= uvm_hdl_read not found (bad)");
-    $display("===\nUVM Report expected on next line:");
-    i = uvm_hdl_deposit("t.__DEPOSIT_NOT_FOUND", lval);
-    `checkh(i, 0);
-
     $display("= uvm_hdl_deposit simple variable");
     lval = 1024'hab;
     i = uvm_hdl_deposit("t.exposed", lval);
@@ -149,6 +146,23 @@ module t;
     i = uvm_hdl_deposit("t.exposed[99:15]", lval);
     `checkh(i, 0);
 
+    $display("= uvm_hdl_deposit not found (bad)");
+    $display("===\nUVM Report expected on next line:");
+    i = uvm_hdl_deposit("t.__DEPOSIT_NOT_FOUND", 12);
+    `checkh(i, 0);
+
+`ifdef VERILATOR
+    $display("= uvm_hdl_deposit to not exposed (bad)");
+    $display("===\nUVM Report expected on next line:");
+    i = uvm_hdl_deposit("t.not_exposed", 12);
+    `checkh(i, 0);
+`endif
+
+    // Force-release
+    exposed = 32'h11223344;
+    i = uvm_hdl_read("t.exposed", lval);
+    `checkh(i, 1);
+    `checkh(lval[31:0], exposed);
 `ifdef VERILATOR
     // UNSUPPORTED: force/release via VPI
     // If support, validate or throw unsupported on force/release part-selects
@@ -166,6 +180,16 @@ module t;
     $display("===\nUVM Report expected on next line:");
     i = uvm_hdl_release_and_read("t.exposed", lval);
     `checkh(i, 0);
+
+    $display("= uvm_hdl_force to not exposed (bad)");
+    $display("===\nUVM Report expected on next line:");
+    i = uvm_hdl_force("t.not_exposed", 12);
+    `checkh(i, 0);
+
+    $display("= uvm_hdl_force to not forcable (bad)");
+    $display("===\nUVM Report expected on next line:");
+    i = uvm_hdl_force("t.exposed_not_forceable", 12);
+    `checkh(i, 0);
 `endif
 
     $write("*-* All Finished *-*\n");

test_regress/t/t_uvm_dpi_v2017_1_0.out

@@ -1,13 +1,8 @@
-UVM Report t/t_uvm_dpi.v:52: id message
+UVM Report t/t_uvm_dpi.v:54: id message
 uvm_dpi_get_tool_name_c() = Verilator
 = uvm_re
 = uvm_hdl_check_path
 = uvm_hdl_read simple variable
-= uvm_hdl_read not found (bad)
-===
-UVM Report expected on next line:
-UVM Report ../../t/uvm/v2017_1_0/dpi/uvm_hdl_verilator.c:54: UVM/DPI/HDL_SET set: unable to locate hdl path (t.__DEPOSIT_NOT_FOUND)
- Either the name is incorrect, or you may not have PLI/ACC visibility to that name
 = uvm_hdl_deposit simple variable
 = uvm_hdl_read single bit
 = uvm_hdl_deposit single bit
@@ -22,6 +17,16 @@ UVM Report ../../t/uvm/v2017_1_0/dpi/uvm_hdl_verilator.c:54: UVM/DPI/HDL_SET set
 UVM Report expected on next line:
 UVM Report ../../t/uvm/v2017_1_0/dpi/uvm_hdl_verilator.c:54: UVM/DPI/HDL_SET set: unable to locate hdl path (t.exposed[99:15])
  Either the name is incorrect, or you may not have PLI/ACC visibility to that name
+= uvm_hdl_deposit not found (bad)
+===
+UVM Report expected on next line:
+UVM Report ../../t/uvm/v2017_1_0/dpi/uvm_hdl_verilator.c:54: UVM/DPI/HDL_SET set: unable to locate hdl path (t.__DEPOSIT_NOT_FOUND)
+ Either the name is incorrect, or you may not have PLI/ACC visibility to that name
+= uvm_hdl_deposit to not exposed (bad)
+===
+UVM Report expected on next line:
+UVM Report ../../t/uvm/v2017_1_0/dpi/uvm_hdl_verilator.c:54: UVM/DPI/HDL_SET set: unable to locate hdl path (t.not_exposed)
+ Either the name is incorrect, or you may not have PLI/ACC visibility to that name
 = uvm_hdl_force
 ===
 UVM Report expected on next line:
@@ -34,4 +39,12 @@ UVM Report ../../t/uvm/v2017_1_0/dpi/uvm_hdl_verilator.c:54: UVM/DPI/VLOG_GET Un
 ===
 UVM Report expected on next line:
 UVM Report ../../t/uvm/v2017_1_0/dpi/uvm_hdl_verilator.c:54: UVM/DPI/VLOG_GET Unsupported: uvh_hdl_force/uvm_hdl_release on hdl path 't.exposed'
+= uvm_hdl_force to not exposed (bad)
+===
+UVM Report expected on next line:
+UVM Report ../../t/uvm/v2017_1_0/dpi/uvm_hdl_verilator.c:54: UVM/DPI/VLOG_GET Unsupported: uvh_hdl_force/uvm_hdl_release on hdl path 't.not_exposed'
+= uvm_hdl_force to not forcable (bad)
+===
+UVM Report expected on next line:
+UVM Report ../../t/uvm/v2017_1_0/dpi/uvm_hdl_verilator.c:54: UVM/DPI/VLOG_GET Unsupported: uvh_hdl_force/uvm_hdl_release on hdl path 't.exposed_not_forceable'
 *-* All Finished *-*

test_regress/t/t_uvm_dpi_v2020_3_1.out

@@ -1,13 +1,8 @@
-UVM Report t/t_uvm_dpi.v:52: id message
+UVM Report t/t_uvm_dpi.v:54: id message
 uvm_dpi_get_tool_name_c() = Verilator
 = uvm_re
 = uvm_hdl_check_path
 = uvm_hdl_read simple variable
-= uvm_hdl_read not found (bad)
-===
-UVM Report expected on next line:
-UVM Report ../../t/uvm/v2020_3_1/dpi/uvm_hdl_verilator.c:54: UVM/DPI/HDL_SET set: unable to locate hdl path (t.__DEPOSIT_NOT_FOUND)
- Either the name is incorrect, or you may not have PLI/ACC visibility to that name
 = uvm_hdl_deposit simple variable
 = uvm_hdl_read single bit
 = uvm_hdl_deposit single bit
@@ -22,6 +17,16 @@ UVM Report ../../t/uvm/v2020_3_1/dpi/uvm_hdl_verilator.c:54: UVM/DPI/HDL_SET set
 UVM Report expected on next line:
 UVM Report ../../t/uvm/v2020_3_1/dpi/uvm_hdl_verilator.c:54: UVM/DPI/HDL_SET set: unable to locate hdl path (t.exposed[99:15])
  Either the name is incorrect, or you may not have PLI/ACC visibility to that name
+= uvm_hdl_deposit not found (bad)
+===
+UVM Report expected on next line:
+UVM Report ../../t/uvm/v2020_3_1/dpi/uvm_hdl_verilator.c:54: UVM/DPI/HDL_SET set: unable to locate hdl path (t.__DEPOSIT_NOT_FOUND)
+ Either the name is incorrect, or you may not have PLI/ACC visibility to that name
+= uvm_hdl_deposit to not exposed (bad)
+===
+UVM Report expected on next line:
+UVM Report ../../t/uvm/v2020_3_1/dpi/uvm_hdl_verilator.c:54: UVM/DPI/HDL_SET set: unable to locate hdl path (t.not_exposed)
+ Either the name is incorrect, or you may not have PLI/ACC visibility to that name
 = uvm_hdl_force
 ===
 UVM Report expected on next line:
@@ -34,4 +39,12 @@ UVM Report ../../t/uvm/v2020_3_1/dpi/uvm_hdl_verilator.c:54: UVM/DPI/VLOG_GET Un
 ===
 UVM Report expected on next line:
 UVM Report ../../t/uvm/v2020_3_1/dpi/uvm_hdl_verilator.c:54: UVM/DPI/VLOG_GET Unsupported: uvh_hdl_force/uvm_hdl_release on hdl path 't.exposed'
+= uvm_hdl_force to not exposed (bad)
+===
+UVM Report expected on next line:
+UVM Report ../../t/uvm/v2020_3_1/dpi/uvm_hdl_verilator.c:54: UVM/DPI/VLOG_GET Unsupported: uvh_hdl_force/uvm_hdl_release on hdl path 't.not_exposed'
+= uvm_hdl_force to not forcable (bad)
+===
+UVM Report expected on next line:
+UVM Report ../../t/uvm/v2020_3_1/dpi/uvm_hdl_verilator.c:54: UVM/DPI/VLOG_GET Unsupported: uvh_hdl_force/uvm_hdl_release on hdl path 't.exposed_not_forceable'
 *-* All Finished *-*