Fix internal error forcing an array element read at a run-time index (#8004)
This commit is contained in:
BRDR LIFE
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589c9b9433
commit
9cddf46932
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@ -247,7 +247,7 @@ public:
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if (AstNodeExpr* exprp = VN_CAST(sampledp->exprp(), NodeExpr))
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return getOneVarRef(exprp);
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AstVarRef* const varRefp = VN_CAST(basep, VarRef);
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UASSERT_OBJ(varRefp, forceStmtp, "`force` assignment has no VarRef on LHS");
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UASSERT_OBJ(varRefp, forceStmtp, "Force/release expression has no VarRef at its base");
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return varRefp;
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}
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@ -366,8 +366,11 @@ public:
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AstNodeExpr* indexExprp) const {
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UASSERT(varInfo.m_forceVecVscp, "No forceVec for forced variable");
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originalExprp->foreach(
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[](AstVarRef* const refp) { ForceState::markNonReplaceable(refp); });
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// Protect only the read this call replaces, which would otherwise be replaced
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// again and recurse. Everything else in the expression is an ordinary read and
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// must still see its own force, including an index read of the same array as in
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// 'mem[mem[0]]'.
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markNonReplaceable(getOneVarRef(originalExprp));
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AstNodeExpr* const origValp
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= addRhsValueReads(varInfo, castToNodeDType(originalExprp, dtypeFromp));
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@ -552,12 +555,36 @@ public:
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static AstNodeExpr* buildFlattenIndexExpr(FileLine* flp, const ArraySelInfo& info) {
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const std::vector<int> dimSizes = arraySelDimSizes(info);
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std::vector<int> constIndices;
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constIndices.reserve(info.m_sels.size());
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bool allConst = true;
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for (AstArraySel* const selp : info.m_sels) {
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constIndices.push_back(VN_AS(selp->bitp(), Const)->toSInt());
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if (!VN_IS(selp->bitp(), Const)) {
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allConst = false;
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break;
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}
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}
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return makeConst32(flp, flattenIndex(constIndices, dimSizes));
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if (allConst) {
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std::vector<int> constIndices;
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constIndices.reserve(info.m_sels.size());
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for (AstArraySel* const selp : info.m_sels) {
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constIndices.push_back(VN_AS(selp->bitp(), Const)->toSInt());
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}
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return makeConst32(flp, flattenIndex(constIndices, dimSizes));
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}
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// A read may select the element at run time, so compute the same flattened index
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// as flattenIndex() does, but as an expression. Only a force target has to be a
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// constant element; 'array[i]' with a variable 'i' is an ordinary read.
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AstNodeExpr* resultp = nullptr;
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int stride = 1;
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for (int i = static_cast<int>(info.m_sels.size()) - 1; i >= 0; --i) {
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AstNodeExpr* termp = info.m_sels[i]->bitp()->cloneTreePure(false);
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// V3Width sizes an array index to at most 32 bits, so widening is all that
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// is needed to keep the arithmetic below width matched.
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if (termp->width() < 32) termp = new AstExtend{flp, termp, 32};
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if (stride != 1) termp = new AstMul{flp, termp, makeConst32(flp, stride)};
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resultp = resultp ? new AstAdd{flp, resultp, termp} : termp;
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stride *= dimSizes[i];
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}
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return resultp;
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}
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static AstNodeExpr* buildRhsDataExpr(FileLine* flp, const ForceInfo& finfo) {
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@ -1350,11 +1377,15 @@ class ForceReplaceVisitor final : public VNVisitor {
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VL_DO_DANGLING(pushDeletep(nodep), nodep);
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}
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void visit(AstArraySel* nodep) override {
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if (nodep->backp() && VN_IS(nodep->backp(), ArraySel)) {
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// Only the outermost unpacked array selection should become a force-aware read;
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// inner nested selections are folded into the final flattened index.
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iterateChildren(nodep);
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return;
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if (const AstArraySel* const backSelp = VN_CAST(nodep->backp(), ArraySel)) {
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// Only the outermost selection of the array path should become a force-aware
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// read; inner selections along 'fromp' fold into the final flattened index.
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// A selection used as the index is a read in its own right, as in
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// 'mem[mem[0]]', so it must not be skipped here.
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if (backSelp->fromp() == nodep) {
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iterateChildren(nodep);
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return;
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}
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}
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AstNode* const basep = AstArraySel::baseFromp(nodep, true);
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@ -1379,6 +1410,11 @@ class ForceReplaceVisitor final : public VNVisitor {
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return;
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}
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const ForceState::ArraySelInfo arrayInfo = ForceState::getArraySelInfo(nodep);
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// Substitute forced reads inside the index expressions before anything is cloned,
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// so the fallback value and the flattened index use the same, force-aware index.
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// An index is an ordinary read, including when it reads the same array as in
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// 'mem[mem[0]]'.
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for (AstArraySel* const selp : arrayInfo.m_sels) iterateAndNextNull(selp->bitp());
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AstNodeExpr* const indexExprp
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= ForceState::buildFlattenIndexExpr(nodep->fileline(), arrayInfo);
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AstNodeExpr* const readExprp
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@ -0,0 +1,18 @@
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#!/usr/bin/env python3
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# This program is free software; you can redistribute it and/or modify it
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# under the terms of either the GNU Lesser General Public License Version 3
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# or the Perl Artistic License Version 2.0.
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# SPDX-FileCopyrightText: 2026 Wilson Snyder
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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import vltest_bootstrap
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test.scenarios('simulator')
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test.compile(timing_loop=True, verilator_flags2=["--timing"])
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test.execute()
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test.passes()
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@ -0,0 +1,295 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain.
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// SPDX-FileCopyrightText: 2026 BRDR LIFE
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// SPDX-License-Identifier: CC0-1.0
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// Reading an unpacked array at a run-time index, while some element of that
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// array is forced, reads the forced element when the index selects it and the
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// stored element otherwise (IEEE 1800-2023 10.6.2).
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//
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// A force target names one constant element, but a read may select at run time,
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// including through an index that is itself forced, and including an index that
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// reads the same array. The declared range need not start at zero.
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// verilog_format: off
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`define stop $stop
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`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d: got=%0x exp=%0x\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0);
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// verilog_format: on
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module sub (
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input logic [3:0] idx,
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output logic [7:0] rd,
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output logic [7:0] rd2d,
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output logic [7:0] proc,
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output logic [7:0] rdns,
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output logic [7:0] rd3d,
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input logic [1:0] s0,
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input logic [1:0] s1,
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input logic [1:0] s2,
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input logic [63:0] wide,
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output logic [7:0] sweep,
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output logic [7:0] rdwide,
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output logic [1:0] rdself,
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output logic [7:0] rdneg,
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output logic [7:0] rdmix,
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output logic [7:0] rdconst,
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output logic [7:0] rdblend,
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output logic [3:0] rdsel,
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output logic [7:0] rdforceable,
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output logic [7:0] rdwr
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);
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logic [7:0] mem[16];
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logic [7:0] m2[4][4];
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// Non-square, so a transposed stride or swapped dimension order is detectable.
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logic [7:0] mns[2][5];
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// Indexed by itself, so the inner read is an index read of the same array.
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logic [1:0] selfm[4];
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logic [7:0] m3[2][3][4];
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// Declared range does not start at zero and runs through negative indices.
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logic [7:0] mneg[13:-2];
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// A partial bit-range force on an element blends with the stored bits.
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logic [7:0] pb[8];
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// Marked forceable, which reaches the element through a different path than a
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// plain procedural force does.
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logic [7:0] fa[8] /* verilator forceable */;
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// Written, rather than read, through a run-time index.
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logic [7:0] wr[8];
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initial begin
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for (int i = 0; i < 16; ++i) mem[i] = 8'h10 + i[7:0];
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for (int i = 0; i < 4; ++i) for (int j = 0; j < 4; ++j) m2[i][j] = 8'h40 + 8'(i * 4 + j);
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for (int i = 0; i < 2; ++i) for (int j = 0; j < 5; ++j) mns[i][j] = 8'h60 + 8'(i * 5 + j);
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selfm[0] = 2'd0;
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selfm[1] = 2'd2;
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selfm[2] = 2'd1;
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selfm[3] = 2'd3;
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for (int i = 0; i < 2; ++i)
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for (int j = 0; j < 3; ++j)
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for (int k = 0; k < 4; ++k) m3[i][j][k] = 8'h80 + 8'((i * 3 + j) * 4 + k);
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for (int i = -2; i <= 13; ++i) mneg[i] = 8'ha0 + 8'(i + 2);
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for (int i = 0; i < 8; ++i) begin
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pb[i] = 8'hc0 + 8'(i);
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fa[i] = 8'hd0 + 8'(i);
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end
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end
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// Continuous read at a run-time index.
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assign rd = mem[idx];
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// Two unpacked dimensions, both indexed at run time.
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assign rd2d = m2[idx[3:2]][idx[1:0]];
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// The same run-time indexed read, procedurally.
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always_comb proc = mem[idx];
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// Non-square and 3-D, all subscripts selected at run time.
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assign rdns = mns[idx[2]][3'(idx[1:0])];
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assign rd3d = m3[idx[3]][idx[1:0]%3][idx[1:0]];
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// Every subscript driven independently, so the sweep below reaches all elements.
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assign sweep = m3[s0[0]][s1][s2];
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// The array indexed by itself. Forcing selfm[0] must change which element the
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// outer read selects, because the inner read is an ordinary read of that element.
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assign rdself = selfm[selfm[0]];
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// Declared range [13:-2], so the index needs the declared low bound applied.
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assign rdneg = mneg[$signed({1'b0, idx})-2];
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// One subscript constant, one selected at run time.
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assign rdmix = m3[1][s1][2];
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// Every subscript constant, which is the path that folds to a constant index.
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assign rdconst = mem[3];
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// A partial bit-range force on the element blends with its stored bits, read
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// through a run-time index.
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assign rdblend = pb[idx[2:0]];
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// A bit select wrapped around the run-time array select.
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assign rdsel = mem[idx][3:0];
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// The same run-time indexed read of an array marked forceable.
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assign rdforceable = fa[idx[2:0]];
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// Written through a run-time index, then read back at a fixed one.
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always_comb begin
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for (int i = 0; i < 8; ++i) wr[i] = 8'h00;
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wr[idx[2:0]] = 8'hee;
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end
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assign rdwr = wr[3];
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// A 64-bit index. V3Width truncates it to the array's index width, so this is
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// the same element a plain read selects; WIDTHTRUNC is expected and waived.
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/* verilator lint_off WIDTHTRUNC */
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assign rdwide = mem[wide];
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/* verilator lint_on WIDTHTRUNC */
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endmodule
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module t;
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logic [3:0] addr;
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logic [7:0] rd, rd2d, proc, rdns, rd3d, sweep, rdwide;
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logic [1:0] rdself;
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logic [7:0] rdneg, rdmix, rdconst;
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logic [7:0] rdblend, rdforceable, rdwr;
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logic [3:0] rdsel;
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logic [1:0] s0, s1, s2;
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logic [63:0] wide;
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sub u (
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.idx(addr),
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.rd(rd),
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.rd2d(rd2d),
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.proc(proc),
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.rdns(rdns),
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.rd3d(rd3d),
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.s0(s0),
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.s1(s1),
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.s2(s2),
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.wide(wide),
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.sweep(sweep),
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.rdwide(rdwide),
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.rdself(rdself),
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.rdneg(rdneg),
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.rdmix(rdmix),
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.rdconst(rdconst),
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.rdblend(rdblend),
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.rdsel(rdsel),
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.rdforceable(rdforceable),
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.rdwr(rdwr)
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);
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initial begin
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addr = 4'h6;
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#1;
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// Nothing forced yet.
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`checkh(rd, 8'h16)
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`checkh(proc, 8'h16)
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`checkh(rd2d, 8'h46) // m2[1][2]
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force u.mem[7] = 8'haa;
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force u.m2[2][3] = 8'hbb;
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#1;
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// Index still selects an element that is not forced.
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`checkh(rd, 8'h16)
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`checkh(proc, 8'h16)
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`checkh(rd2d, 8'h46)
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addr = 4'h7;
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#1;
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// Run-time index now selects the forced element of the 1-D array.
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`checkh(rd, 8'haa)
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`checkh(proc, 8'haa)
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`checkh(rd2d, 8'h47) // m2[1][3], not forced
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addr = 4'hb;
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#1;
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// Run-time index now selects the forced element of the 2-D array.
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`checkh(rd, 8'h1b)
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`checkh(proc, 8'h1b)
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`checkh(rd2d, 8'hbb) // m2[2][3]
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// Non-square and 3-D reads at run-time subscripts. A swapped stride would
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// pick a different element in each of these.
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addr = 4'h6; // [2]=1 [1:0]=2 -> mns[1][2]; [3]=0 [1:0]%3=2 [1:0]=2 -> m3[0][2][2]
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#1;
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`checkh(rdns, 8'h67)
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`checkh(rd3d, 8'h8a)
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addr = 4'h3; // [2]=0 [1:0]=3 -> mns[0][3]; [3]=0 [1:0]%3=0 [1:0]=3 -> m3[0][0][3]
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#1;
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`checkh(rdns, 8'h63)
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`checkh(rd3d, 8'h83)
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// A forced index must be seen by the run-time indexed read of a forced array,
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// and the continuous and procedural reads must agree.
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force u.idx = 4'h7;
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#1;
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`checkh(rd, 8'haa)
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`checkh(proc, 8'haa)
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release u.mem[7];
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force u.idx = 4'h5;
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#1;
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`checkh(rd, 8'h15)
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`checkh(proc, 8'h15)
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// Exhaustive sweep of the 3-D array against an independent model, with one
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// element forced. Any stride or dimension-order error picks a different
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// element for some subscript triple and is caught here regardless of shape.
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force u.m3[1][2][3] = 8'hde;
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#1;
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for (int i = 0; i < 2; ++i) begin
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for (int j = 0; j < 3; ++j) begin
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for (int k = 0; k < 4; ++k) begin
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logic [7:0] want;
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s0 = 2'(i);
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s1 = 2'(j);
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s2 = 2'(k);
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want = (i == 1 && j == 2 && k == 3) ? 8'hde : 8'h80 + 8'((i * 3 + j) * 4 + k);
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#1;
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`checkh(sweep, want)
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end
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end
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end
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release u.m3[1][2][3];
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// A 64-bit index is truncated to the array's index width, forced or not.
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wide = 64'd9;
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#1;
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`checkh(rdwide, 8'h19)
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force u.mem[9] = 8'h5a;
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#1;
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`checkh(rdwide, 8'h5a)
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wide = 64'h1_0000_0009; // truncates to 9, same element
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#1;
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`checkh(rdwide, 8'h5a)
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release u.mem[9];
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// An array indexed by itself: the inner read is an ordinary read, so forcing
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// the element it names changes which element the outer read selects.
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`checkh(rdself, 2'd0) // selfm[selfm[0]] = selfm[0] = 0
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force u.selfm[0] = 2'd1;
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#1;
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`checkh(rdself, 2'd2) // inner read is forced to 1, so selfm[1] = 2
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release u.selfm[0];
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// Declared range [13:-2]. addr=6 selects mneg[4].
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release u.idx;
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addr = 4'h6;
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#1;
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`checkh(rdneg, 8'ha6)
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`checkh(rdmix, 8'h96) // m3[1][2][2]
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`checkh(rdconst, 8'h13)
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force u.mneg[4] = 8'hb1;
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force u.m3[1][2][2] = 8'hb2;
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force u.mem[3] = 8'hb3;
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#1;
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`checkh(rdneg, 8'hb1)
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`checkh(rdmix, 8'hb2)
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`checkh(rdconst, 8'hb3)
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// A negative index, and a mixed read whose run-time subscript moves off the
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// forced element.
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addr = 4'h0;
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s1 = 2'd0;
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#1;
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`checkh(rdneg, 8'ha0) // mneg[-2]
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`checkh(rdmix, 8'h8e) // m3[1][0][2], not forced
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release u.mneg[4];
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release u.m3[1][2][2];
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release u.mem[3];
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// A partial bit-range force, a bit select around the array select, an array
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// marked forceable, and a write through a run-time index.
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addr = 4'h5;
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#1;
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`checkh(rdblend, 8'hc5)
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`checkh(rdsel, 4'h5)
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`checkh(rdforceable, 8'hd5)
|
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`checkh(rdwr, 8'h00) // the write went to wr[5]
|
||||
force u.pb[5][3:0] = 4'ha;
|
||||
force u.fa[5] = 8'hdd;
|
||||
#1;
|
||||
`checkh(rdblend, 8'hca) // upper nibble kept, lower nibble forced
|
||||
`checkh(rdforceable, 8'hdd)
|
||||
addr = 4'h3;
|
||||
#1;
|
||||
`checkh(rdblend, 8'hc3) // pb[3], not forced
|
||||
`checkh(rdsel, 4'h3)
|
||||
`checkh(rdforceable, 8'hd3)
|
||||
`checkh(rdwr, 8'hee) // the write now goes to wr[3]
|
||||
release u.pb[5][3:0];
|
||||
release u.fa[5];
|
||||
|
||||
$write("*-* All Finished *-*\n");
|
||||
$finish;
|
||||
end
|
||||
endmodule
|
||||
Loading…
Reference in New Issue