Fix tracing -1 index arrays. Closes #2090.
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Changes
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@ -32,6 +32,8 @@ The contributors that suggested a given feature are shown in []. Thanks!
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**** Fix huge case statement performance. Closes #1644. [Julien Margetts]
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**** Fix huge case statement performance. Closes #1644. [Julien Margetts]
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**** Fix tracing -1 index arrays. Closes #2090. [Yutetsu Takatsukasa]
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* Verilator 4.024 2019-12-08
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* Verilator 4.024 2019-12-08
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@ -118,7 +118,7 @@ void VerilatedFst::declDTypeEnum(int dtypenum, const char* name, vluint32_t elem
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void VerilatedFst::declSymbol(vluint32_t code, const char* name,
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void VerilatedFst::declSymbol(vluint32_t code, const char* name,
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int dtypenum, fstVarDir vardir, fstVarType vartype,
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int dtypenum, fstVarDir vardir, fstVarType vartype,
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int arraynum, vluint32_t len) {
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bool array, int arraynum, vluint32_t len) {
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std::pair<Code2SymbolType::iterator, bool> p
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std::pair<Code2SymbolType::iterator, bool> p
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= m_code2symbol.insert(std::make_pair(code, static_cast<fstHandle>(NULL)));
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= m_code2symbol.insert(std::make_pair(code, static_cast<fstHandle>(NULL)));
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std::istringstream nameiss(name);
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std::istringstream nameiss(name);
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@ -153,8 +153,7 @@ void VerilatedFst::declSymbol(vluint32_t code, const char* name,
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std::stringstream name_ss;
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std::stringstream name_ss;
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name_ss << symbol_name;
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name_ss << symbol_name;
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if (arraynum >= 0)
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if (array) name_ss << "(" << arraynum << ")";
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name_ss << "(" << arraynum << ")";
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std::string name_str = name_ss.str();
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std::string name_str = name_ss.str();
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if (dtypenum > 0) {
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if (dtypenum > 0) {
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@ -60,7 +60,7 @@ private:
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VL_UNCOPYABLE(VerilatedFst);
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VL_UNCOPYABLE(VerilatedFst);
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void declSymbol(vluint32_t code, const char* name,
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void declSymbol(vluint32_t code, const char* name,
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int dtypenum, fstVarDir vardir, fstVarType vartype,
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int dtypenum, fstVarDir vardir, fstVarType vartype,
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int arraynum, vluint32_t len);
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bool array, int arraynum, vluint32_t len);
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// helpers
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// helpers
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std::vector<char> m_valueStrBuffer;
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std::vector<char> m_valueStrBuffer;
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public:
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public:
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@ -103,33 +103,33 @@ public:
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/// Inside dumping routines, declare a signal
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/// Inside dumping routines, declare a signal
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void declBit(vluint32_t code, const char* name,
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void declBit(vluint32_t code, const char* name,
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int dtypenum, fstVarDir vardir, fstVarType vartype,
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int dtypenum, fstVarDir vardir, fstVarType vartype,
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int arraynum) {
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bool array, int arraynum) {
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declSymbol(code, name, dtypenum, vardir, vartype, arraynum, 1);
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declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, 1);
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}
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}
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void declBus(vluint32_t code, const char* name,
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void declBus(vluint32_t code, const char* name,
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int dtypenum, fstVarDir vardir, fstVarType vartype,
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int dtypenum, fstVarDir vardir, fstVarType vartype,
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int arraynum, int msb, int lsb) {
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bool array, int arraynum, int msb, int lsb) {
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declSymbol(code, name, dtypenum, vardir, vartype, arraynum, msb - lsb + 1);
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declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, msb - lsb + 1);
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}
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}
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void declDouble(vluint32_t code, const char* name,
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void declDouble(vluint32_t code, const char* name,
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int dtypenum, fstVarDir vardir, fstVarType vartype,
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int dtypenum, fstVarDir vardir, fstVarType vartype,
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int arraynum) {
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bool array, int arraynum) {
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declSymbol(code, name, dtypenum, vardir, vartype, arraynum, 2);
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declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, 2);
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}
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}
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void declFloat(vluint32_t code, const char* name,
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void declFloat(vluint32_t code, const char* name,
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int dtypenum, fstVarDir vardir, fstVarType vartype,
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int dtypenum, fstVarDir vardir, fstVarType vartype,
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int arraynum) {
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bool array, int arraynum) {
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declSymbol(code, name, dtypenum, vardir, vartype, arraynum, 1);
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declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, 1);
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}
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}
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void declQuad(vluint32_t code, const char* name,
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void declQuad(vluint32_t code, const char* name,
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int dtypenum, fstVarDir vardir, fstVarType vartype,
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int dtypenum, fstVarDir vardir, fstVarType vartype,
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int arraynum, int msb, int lsb) {
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bool array, int arraynum, int msb, int lsb) {
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declSymbol(code, name, dtypenum, vardir, vartype, arraynum, msb - lsb + 1);
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declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, msb - lsb + 1);
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}
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}
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void declArray(vluint32_t code, const char* name,
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void declArray(vluint32_t code, const char* name,
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int dtypenum, fstVarDir vardir, fstVarType vartype,
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int dtypenum, fstVarDir vardir, fstVarType vartype,
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int arraynum, int msb, int lsb) {
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bool array, int arraynum, int msb, int lsb) {
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declSymbol(code, name, dtypenum, vardir, vartype, arraynum, msb - lsb + 1);
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declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, msb - lsb + 1);
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}
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}
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/// Inside dumping routines, dump one signal if it has changed
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/// Inside dumping routines, dump one signal if it has changed
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@ -525,7 +525,7 @@ void VerilatedVcd::module(const std::string& name) {
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}
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}
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void VerilatedVcd::declare(vluint32_t code, const char* name, const char* wirep,
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void VerilatedVcd::declare(vluint32_t code, const char* name, const char* wirep,
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int arraynum, bool tri, bool bussed, int msb, int lsb) {
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bool array, int arraynum, bool tri, bool bussed, int msb, int lsb) {
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if (!code) { VL_FATAL_MT(__FILE__, __LINE__, "",
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if (!code) { VL_FATAL_MT(__FILE__, __LINE__, "",
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"Internal: internal trace problem, code 0 is illegal"); }
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"Internal: internal trace problem, code 0 is illegal"); }
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@ -584,7 +584,7 @@ void VerilatedVcd::declare(vluint32_t code, const char* name, const char* wirep,
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}
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}
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decl += " ";
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decl += " ";
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decl += basename;
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decl += basename;
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if (arraynum>=0) {
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if (array) {
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sprintf(buf, "(%d)", arraynum);
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sprintf(buf, "(%d)", arraynum);
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decl += buf;
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decl += buf;
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hiername += buf;
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hiername += buf;
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@ -597,26 +597,42 @@ void VerilatedVcd::declare(vluint32_t code, const char* name, const char* wirep,
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m_namemapp->insert(std::make_pair(hiername,decl));
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m_namemapp->insert(std::make_pair(hiername,decl));
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}
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}
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void VerilatedVcd::declBit (vluint32_t code, const char* name, int arraynum)
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void VerilatedVcd::declBit(vluint32_t code, const char* name, bool array, int arraynum) {
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{ declare(code, name, "wire", arraynum, false, false, 0, 0); }
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declare(code, name, "wire", array, arraynum, false, false, 0, 0);
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void VerilatedVcd::declBus (vluint32_t code, const char* name, int arraynum, int msb, int lsb)
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}
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{ declare(code, name, "wire", arraynum, false, true, msb, lsb); }
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void VerilatedVcd::declBus(vluint32_t code, const char* name, bool array, int arraynum, int msb,
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void VerilatedVcd::declQuad (vluint32_t code, const char* name, int arraynum, int msb, int lsb)
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int lsb) {
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{ declare(code, name, "wire", arraynum, false, true, msb, lsb); }
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declare(code, name, "wire", array, arraynum, false, true, msb, lsb);
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void VerilatedVcd::declArray (vluint32_t code, const char* name, int arraynum, int msb, int lsb)
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}
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{ declare(code, name, "wire", arraynum, false, true, msb, lsb); }
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void VerilatedVcd::declQuad(vluint32_t code, const char* name, bool array, int arraynum, int msb,
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void VerilatedVcd::declTriBit (vluint32_t code, const char* name, int arraynum)
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int lsb) {
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{ declare(code, name, "wire", arraynum, true, false, 0, 0); }
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declare(code, name, "wire", array, arraynum, false, true, msb, lsb);
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void VerilatedVcd::declTriBus (vluint32_t code, const char* name, int arraynum, int msb, int lsb)
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}
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{ declare(code, name, "wire", arraynum, true, true, msb, lsb); }
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void VerilatedVcd::declArray(vluint32_t code, const char* name, bool array, int arraynum, int msb,
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void VerilatedVcd::declTriQuad (vluint32_t code, const char* name, int arraynum, int msb, int lsb)
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int lsb) {
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{ declare(code, name, "wire", arraynum, true, true, msb, lsb); }
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declare(code, name, "wire", array, arraynum, false, true, msb, lsb);
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void VerilatedVcd::declTriArray (vluint32_t code, const char* name, int arraynum, int msb, int lsb)
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}
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{ declare(code, name, "wire", arraynum, true, true, msb, lsb); }
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void VerilatedVcd::declTriBit(vluint32_t code, const char* name, bool array, int arraynum) {
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void VerilatedVcd::declFloat (vluint32_t code, const char* name, int arraynum)
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declare(code, name, "wire", array, arraynum, true, false, 0, 0);
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{ declare(code, name, "real", arraynum, false, false, 31, 0); }
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}
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void VerilatedVcd::declDouble (vluint32_t code, const char* name, int arraynum)
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void VerilatedVcd::declTriBus(vluint32_t code, const char* name, bool array, int arraynum, int msb,
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{ declare(code, name, "real", arraynum, false, false, 63, 0); }
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int lsb) {
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declare(code, name, "wire", array, arraynum, true, true, msb, lsb);
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}
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void VerilatedVcd::declTriQuad(vluint32_t code, const char* name, bool array, int arraynum,
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int msb, int lsb) {
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declare(code, name, "wire", array, arraynum, true, true, msb, lsb);
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}
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void VerilatedVcd::declTriArray(vluint32_t code, const char* name, bool array, int arraynum,
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int msb, int lsb) {
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declare(code, name, "wire", array, arraynum, true, true, msb, lsb);
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}
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void VerilatedVcd::declFloat(vluint32_t code, const char* name, bool array, int arraynum) {
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declare(code, name, "real", array, arraynum, false, false, 31, 0);
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}
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void VerilatedVcd::declDouble(vluint32_t code, const char* name, bool array, int arraynum) {
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declare(code, name, "real", array, arraynum, false, false, 63, 0);
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}
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//=============================================================================
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//=============================================================================
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@ -125,8 +125,8 @@ private:
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void printStr(const char* str);
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void printStr(const char* str);
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void printQuad(vluint64_t n);
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void printQuad(vluint64_t n);
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void printTime(vluint64_t timeui);
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void printTime(vluint64_t timeui);
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void declare(vluint32_t code, const char* name, const char* wirep,
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void declare(vluint32_t code, const char* name, const char* wirep, bool array, int arraynum,
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int arraynum, bool tri, bool bussed, int msb, int lsb);
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bool tri, bool bussed, int msb, int lsb);
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void dumpHeader();
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void dumpHeader();
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void dumpPrep(vluint64_t timeui);
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void dumpPrep(vluint64_t timeui);
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@ -201,16 +201,16 @@ public:
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/// Inside dumping routines, declare a module
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/// Inside dumping routines, declare a module
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void module(const std::string& name);
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void module(const std::string& name);
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/// Inside dumping routines, declare a signal
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/// Inside dumping routines, declare a signal
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void declBit (vluint32_t code, const char* name, int arraynum);
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void declBit( vluint32_t code, const char* name, bool array, int arraynum);
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void declBus (vluint32_t code, const char* name, int arraynum, int msb, int lsb);
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void declBus( vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb);
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void declQuad (vluint32_t code, const char* name, int arraynum, int msb, int lsb);
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void declQuad( vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb);
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void declArray (vluint32_t code, const char* name, int arraynum, int msb, int lsb);
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void declArray( vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb);
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void declTriBit (vluint32_t code, const char* name, int arraynum);
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void declTriBit( vluint32_t code, const char* name, bool array, int arraynum);
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void declTriBus (vluint32_t code, const char* name, int arraynum, int msb, int lsb);
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void declTriBus( vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb);
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void declTriQuad (vluint32_t code, const char* name, int arraynum, int msb, int lsb);
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void declTriQuad( vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb);
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void declTriArray (vluint32_t code, const char* name, int arraynum, int msb, int lsb);
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void declTriArray(vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb);
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void declDouble (vluint32_t code, const char* name, int arraynum);
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void declDouble( vluint32_t code, const char* name, bool array, int arraynum);
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void declFloat (vluint32_t code, const char* name, int arraynum);
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void declFloat( vluint32_t code, const char* name, bool array, int arraynum);
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// ... other module_start for submodules (based on cell name)
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// ... other module_start for submodules (based on cell name)
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/// Inside dumping routines, dump one signal
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/// Inside dumping routines, dump one signal
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@ -3062,13 +3062,13 @@ class EmitCTrace : EmitCStmts {
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}
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}
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// Range
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// Range
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if (nodep->arrayRange().ranged()) {
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if (nodep->arrayRange().ranged()) {
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puts(",(i+"+cvtToStr(nodep->arrayRange().lo())+")");
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puts(", true,(i+" + cvtToStr(nodep->arrayRange().lo()) + ")");
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} else {
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} else {
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puts(",-1");
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puts(", false,-1");
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}
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}
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if (!nodep->dtypep()->basicp()->isDouble() // When float/double no longer have widths this can go
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if (!nodep->dtypep()->basicp()->isDouble() && nodep->bitRange().ranged()) {
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&& nodep->bitRange().ranged()) {
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puts(", " + cvtToStr(nodep->bitRange().left()) + ","
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puts(","+cvtToStr(nodep->bitRange().left())+","+cvtToStr(nodep->bitRange().right()));
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+ cvtToStr(nodep->bitRange().right()));
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}
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}
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puts(");");
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puts(");");
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}
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}
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@ -1,49 +1,52 @@
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$version Generated by VerilatedVcd $end
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$version Generated by VerilatedVcd $end
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$date Wed May 1 19:09:18 2019
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$date Wed Jan 8 07:23:20 2020
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$end
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$end
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$timescale 1ns $end
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$timescale 1ns $end
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$scope module top $end
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$scope module top $end
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$var wire 1 < clk $end
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$var wire 1 /" clk $end
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$scope module $unit $end
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$scope module $unit $end
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$var wire 1 # global_bit $end
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$var wire 1 # global_bit $end
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$upscope $end
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$upscope $end
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$scope module t $end
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$scope module t $end
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$var wire 1 < clk $end
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$var wire 1 /" clk $end
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$var wire 32 $ cyc [31:0] $end
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$var wire 32 + cyc [31:0] $end
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$var real 64 3 v_arr_real(0) $end
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$var wire 8 h" unpacked_array(-1) [7:0] $end
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$var real 64 5 v_arr_real(1) $end
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$var wire 8 g" unpacked_array(-2) [7:0] $end
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$var wire 2 * v_arrp [2:1] $end
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$var wire 8 i" unpacked_array(0) [7:0] $end
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$var wire 4 + v_arrp_arrp [3:0] $end
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$var real 64 E! v_arr_real(0) $end
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$var wire 4 , v_arrp_strp [3:0] $end
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$var real 64 G! v_arr_real(1) $end
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$var wire 1 = v_arru(1) $end
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$var wire 2 [ v_arrp [2:1] $end
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$var wire 1 > v_arru(2) $end
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$var wire 4 c v_arrp_arrp [3:0] $end
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$var wire 2 - v_arru_arrp(3) [2:1] $end
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$var wire 4 k v_arrp_strp [3:0] $end
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$var wire 2 . v_arru_arrp(4) [2:1] $end
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$var wire 1 7" v_arru(1) $end
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$var wire 1 ? v_arru_arru(3)(1) $end
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$var wire 1 8" v_arru(2) $end
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$var wire 1 @ v_arru_arru(3)(2) $end
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$var wire 2 s v_arru_arrp(3) [2:1] $end
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$var wire 1 A v_arru_arru(4)(1) $end
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$var wire 2 t v_arru_arrp(4) [2:1] $end
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$var wire 1 B v_arru_arru(4)(2) $end
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$var wire 1 G" v_arru_arru(3)(1) $end
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$var wire 2 / v_arru_strp(3) [1:0] $end
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$var wire 1 O" v_arru_arru(3)(2) $end
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$var wire 2 0 v_arru_strp(4) [1:0] $end
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$var wire 1 W" v_arru_arru(4)(1) $end
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$var wire 3 9 v_enumb [2:0] $end
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$var wire 1 _" v_arru_arru(4)(2) $end
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$var wire 32 7 v_enumed [31:0] $end
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$var wire 2 %! v_arru_strp(3) [1:0] $end
|
||||||
$var wire 32 8 v_enumed2 [31:0] $end
|
$var wire 2 -! v_arru_strp(4) [1:0] $end
|
||||||
$var real 64 1 v_real $end
|
$var wire 3 u! v_enumb [2:0] $end
|
||||||
$var wire 64 % v_str32x2 [63:0] $end
|
$var wire 32 e! v_enumed [31:0] $end
|
||||||
$var wire 2 ' v_strp [1:0] $end
|
$var wire 32 m! v_enumed2 [31:0] $end
|
||||||
$var wire 4 ( v_strp_strp [3:0] $end
|
$var real 64 5! v_real $end
|
||||||
$var wire 2 ) v_unip_strp [1:0] $end
|
$var wire 64 3 v_str32x2 [63:0] $end
|
||||||
|
$var wire 2 C v_strp [1:0] $end
|
||||||
|
$var wire 4 K v_strp_strp [3:0] $end
|
||||||
|
$var wire 2 S v_unip_strp [1:0] $end
|
||||||
$scope module p2 $end
|
$scope module p2 $end
|
||||||
$var wire 32 C PARAM [31:0] $end
|
$var wire 32 !# PARAM [31:0] $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module p3 $end
|
$scope module p3 $end
|
||||||
$var wire 32 D PARAM [31:0] $end
|
$var wire 32 )# PARAM [31:0] $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module unnamedblk1 $end
|
$scope module unnamedblk1 $end
|
||||||
$var wire 32 : b [31:0] $end
|
$var wire 32 }! b [31:0] $end
|
||||||
$scope module unnamedblk2 $end
|
$scope module unnamedblk2 $end
|
||||||
$var wire 32 ; a [31:0] $end
|
$var wire 32 '" a [31:0] $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
|
|
@ -53,164 +56,167 @@ $enddefinitions $end
|
||||||
|
|
||||||
#0
|
#0
|
||||||
1#
|
1#
|
||||||
b00000000000000000000000000000000 $
|
b00000000000000000000000000000000 +
|
||||||
b0000000000000000000000000000000000000000000000000000000011111111 %
|
b0000000000000000000000000000000000000000000000000000000011111111 3
|
||||||
b00 '
|
b00 C
|
||||||
b0000 (
|
b0000 K
|
||||||
b00 )
|
b00 S
|
||||||
b00 *
|
b00 [
|
||||||
b0000 +
|
b0000 c
|
||||||
b0000 ,
|
b0000 k
|
||||||
b00 -
|
b00 s
|
||||||
b00 .
|
b00 t
|
||||||
b00 /
|
b00 %!
|
||||||
b00 0
|
b00 -!
|
||||||
r0 1
|
r0 5!
|
||||||
r0 3
|
r0 E!
|
||||||
r0 5
|
r0 G!
|
||||||
b00000000000000000000000000000000 7
|
b00000000000000000000000000000000 e!
|
||||||
b00000000000000000000000000000000 8
|
b00000000000000000000000000000000 m!
|
||||||
b000 9
|
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|
||||||
b00000000000000000000000000000000 :
|
b00000000000000000000000000000000 }!
|
||||||
b00000000000000000000000000000000 ;
|
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|
||||||
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|
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|
||||||
0=
|
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|
||||||
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|
08"
|
||||||
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|
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|
||||||
0@
|
0O"
|
||||||
0A
|
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|
||||||
0B
|
0_"
|
||||||
b00000000000000000000000000000010 C
|
b00000000 g"
|
||||||
b00000000000000000000000000000011 D
|
b00000000 h"
|
||||||
|
b00000000 i"
|
||||||
|
b00000000000000000000000000000010 !#
|
||||||
|
b00000000000000000000000000000011 )#
|
||||||
#10
|
#10
|
||||||
b00000000000000000000000000000001 $
|
b00000000000000000000000000000001 +
|
||||||
b0000000000000000000000000000000100000000000000000000000011111110 %
|
b0000000000000000000000000000000100000000000000000000000011111110 3
|
||||||
b11 '
|
b11 C
|
||||||
b1111 (
|
b1111 K
|
||||||
b11 )
|
b11 S
|
||||||
b11 *
|
b11 [
|
||||||
b1111 +
|
b1111 c
|
||||||
b1111 ,
|
b1111 k
|
||||||
b11 -
|
b11 s
|
||||||
b11 .
|
b11 t
|
||||||
b11 /
|
b11 %!
|
||||||
b11 0
|
b11 -!
|
||||||
r0.1 1
|
r0.1 5!
|
||||||
r0.2 3
|
r0.2 E!
|
||||||
r0.3 5
|
r0.3 G!
|
||||||
b00000000000000000000000000000001 7
|
b00000000000000000000000000000001 e!
|
||||||
b00000000000000000000000000000010 8
|
b00000000000000000000000000000010 m!
|
||||||
b111 9
|
b111 u!
|
||||||
b00000000000000000000000000000101 :
|
b00000000000000000000000000000101 }!
|
||||||
b00000000000000000000000000000101 ;
|
b00000000000000000000000000000101 '"
|
||||||
1<
|
1/"
|
||||||
#15
|
#15
|
||||||
0<
|
0/"
|
||||||
#20
|
#20
|
||||||
b00000000000000000000000000000010 $
|
b00000000000000000000000000000010 +
|
||||||
b0000000000000000000000000000001000000000000000000000000011111101 %
|
b0000000000000000000000000000001000000000000000000000000011111101 3
|
||||||
b00 '
|
b00 C
|
||||||
b0000 (
|
b0000 K
|
||||||
b00 )
|
b00 S
|
||||||
b00 *
|
b00 [
|
||||||
b0000 +
|
b0000 c
|
||||||
b0000 ,
|
b0000 k
|
||||||
b00 -
|
b00 s
|
||||||
b00 .
|
b00 t
|
||||||
b00 /
|
b00 %!
|
||||||
b00 0
|
b00 -!
|
||||||
r0.2 1
|
r0.2 5!
|
||||||
r0.4 3
|
r0.4 E!
|
||||||
r0.6 5
|
r0.6 G!
|
||||||
b00000000000000000000000000000010 7
|
b00000000000000000000000000000010 e!
|
||||||
b00000000000000000000000000000100 8
|
b00000000000000000000000000000100 m!
|
||||||
b110 9
|
b110 u!
|
||||||
1<
|
1/"
|
||||||
#25
|
#25
|
||||||
0<
|
0/"
|
||||||
#30
|
#30
|
||||||
b00000000000000000000000000000011 $
|
b00000000000000000000000000000011 +
|
||||||
b0000000000000000000000000000001100000000000000000000000011111100 %
|
b0000000000000000000000000000001100000000000000000000000011111100 3
|
||||||
b11 '
|
b11 C
|
||||||
b1111 (
|
b1111 K
|
||||||
b11 )
|
b11 S
|
||||||
b11 *
|
b11 [
|
||||||
b1111 +
|
b1111 c
|
||||||
b1111 ,
|
b1111 k
|
||||||
b11 -
|
b11 s
|
||||||
b11 .
|
b11 t
|
||||||
b11 /
|
b11 %!
|
||||||
b11 0
|
b11 -!
|
||||||
r0.3 1
|
r0.3 5!
|
||||||
r0.6000000000000001 3
|
r0.6000000000000001 E!
|
||||||
r0.8999999999999999 5
|
r0.8999999999999999 G!
|
||||||
b00000000000000000000000000000011 7
|
b00000000000000000000000000000011 e!
|
||||||
b00000000000000000000000000000110 8
|
b00000000000000000000000000000110 m!
|
||||||
b101 9
|
b101 u!
|
||||||
1<
|
1/"
|
||||||
#35
|
#35
|
||||||
0<
|
0/"
|
||||||
#40
|
#40
|
||||||
b00000000000000000000000000000100 $
|
b00000000000000000000000000000100 +
|
||||||
b0000000000000000000000000000010000000000000000000000000011111011 %
|
b0000000000000000000000000000010000000000000000000000000011111011 3
|
||||||
b00 '
|
b00 C
|
||||||
b0000 (
|
b0000 K
|
||||||
b00 )
|
b00 S
|
||||||
b00 *
|
b00 [
|
||||||
b0000 +
|
b0000 c
|
||||||
b0000 ,
|
b0000 k
|
||||||
b00 -
|
b00 s
|
||||||
b00 .
|
b00 t
|
||||||
b00 /
|
b00 %!
|
||||||
b00 0
|
b00 -!
|
||||||
r0.4 1
|
r0.4 5!
|
||||||
r0.8 3
|
r0.8 E!
|
||||||
r1.2 5
|
r1.2 G!
|
||||||
b00000000000000000000000000000100 7
|
b00000000000000000000000000000100 e!
|
||||||
b00000000000000000000000000001000 8
|
b00000000000000000000000000001000 m!
|
||||||
b100 9
|
b100 u!
|
||||||
1<
|
1/"
|
||||||
#45
|
#45
|
||||||
0<
|
0/"
|
||||||
#50
|
#50
|
||||||
b00000000000000000000000000000101 $
|
b00000000000000000000000000000101 +
|
||||||
b0000000000000000000000000000010100000000000000000000000011111010 %
|
b0000000000000000000000000000010100000000000000000000000011111010 3
|
||||||
b11 '
|
b11 C
|
||||||
b1111 (
|
b1111 K
|
||||||
b11 )
|
b11 S
|
||||||
b11 *
|
b11 [
|
||||||
b1111 +
|
b1111 c
|
||||||
b1111 ,
|
b1111 k
|
||||||
b11 -
|
b11 s
|
||||||
b11 .
|
b11 t
|
||||||
b11 /
|
b11 %!
|
||||||
b11 0
|
b11 -!
|
||||||
r0.5 1
|
r0.5 5!
|
||||||
r1 3
|
r1 E!
|
||||||
r1.5 5
|
r1.5 G!
|
||||||
b00000000000000000000000000000101 7
|
b00000000000000000000000000000101 e!
|
||||||
b00000000000000000000000000001010 8
|
b00000000000000000000000000001010 m!
|
||||||
b011 9
|
b011 u!
|
||||||
1<
|
1/"
|
||||||
#55
|
#55
|
||||||
0<
|
0/"
|
||||||
#60
|
#60
|
||||||
b00000000000000000000000000000110 $
|
b00000000000000000000000000000110 +
|
||||||
b0000000000000000000000000000011000000000000000000000000011111001 %
|
b0000000000000000000000000000011000000000000000000000000011111001 3
|
||||||
b00 '
|
b00 C
|
||||||
b0000 (
|
b0000 K
|
||||||
b00 )
|
b00 S
|
||||||
b00 *
|
b00 [
|
||||||
b0000 +
|
b0000 c
|
||||||
b0000 ,
|
b0000 k
|
||||||
b00 -
|
b00 s
|
||||||
b00 .
|
b00 t
|
||||||
b00 /
|
b00 %!
|
||||||
b00 0
|
b00 -!
|
||||||
r0.6 1
|
r0.6 5!
|
||||||
r1.2 3
|
r1.2 E!
|
||||||
r1.8 5
|
r1.8 G!
|
||||||
b00000000000000000000000000000110 7
|
b00000000000000000000000000000110 e!
|
||||||
b00000000000000000000000000001100 8
|
b00000000000000000000000000001100 m!
|
||||||
b010 9
|
b010 u!
|
||||||
1<
|
1/"
|
||||||
|
|
|
||||||
|
|
@ -65,6 +65,8 @@ module t (clk);
|
||||||
typedef enum logic [2:0] { BZERO=0, BONE, BTWO, BTHREE } enumb_t;
|
typedef enum logic [2:0] { BZERO=0, BONE, BTWO, BTHREE } enumb_t;
|
||||||
enumb_t v_enumb;
|
enumb_t v_enumb;
|
||||||
|
|
||||||
|
logic [7:0] unpacked_array[-2:0];
|
||||||
|
|
||||||
p #(.PARAM(2)) p2 ();
|
p #(.PARAM(2)) p2 ();
|
||||||
p #(.PARAM(3)) p3 ();
|
p #(.PARAM(3)) p3 ();
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,5 +1,5 @@
|
||||||
$date
|
$date
|
||||||
Wed May 1 19:09:18 2019
|
Wed Jan 8 07:26:16 2020
|
||||||
|
|
||||||
$end
|
$end
|
||||||
$version
|
$version
|
||||||
|
|
@ -41,21 +41,24 @@ $var logic 32 8 v_enumed2 $end
|
||||||
$attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end
|
$attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end
|
||||||
$attrbegin misc 07 "" 2 $end
|
$attrbegin misc 07 "" 2 $end
|
||||||
$var logic 3 9 v_enumb $end
|
$var logic 3 9 v_enumb $end
|
||||||
|
$var logic 8 : unpacked_array(-2) $end
|
||||||
|
$var logic 8 ; unpacked_array(-1) $end
|
||||||
|
$var logic 8 < unpacked_array(0) $end
|
||||||
$scope module unnamedblk1 $end
|
$scope module unnamedblk1 $end
|
||||||
$var integer 32 : b $end
|
$var integer 32 = b $end
|
||||||
$scope module unnamedblk2 $end
|
$scope module unnamedblk2 $end
|
||||||
$var integer 32 ; a $end
|
$var integer 32 > a $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module p2 $end
|
$scope module p2 $end
|
||||||
$var parameter 32 < PARAM $end
|
$var parameter 32 ? PARAM $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module p3 $end
|
$scope module p3 $end
|
||||||
$var parameter 32 = PARAM $end
|
$var parameter 32 @ PARAM $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module $unit $end
|
$scope module $unit $end
|
||||||
$var bit 1 > global_bit $end
|
$var bit 1 A global_bit $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$enddefinitions $end
|
$enddefinitions $end
|
||||||
|
|
@ -85,14 +88,17 @@ b0000000000000000000000000000000000000000000000000000000011111111 6
|
||||||
b00000000000000000000000000000000 7
|
b00000000000000000000000000000000 7
|
||||||
b00000000000000000000000000000000 8
|
b00000000000000000000000000000000 8
|
||||||
b000 9
|
b000 9
|
||||||
b00000000000000000000000000000000 :
|
b00000000 :
|
||||||
b00000000000000000000000000000000 ;
|
b00000000 ;
|
||||||
b00000000000000000000000000000010 <
|
b00000000 <
|
||||||
b00000000000000000000000000000011 =
|
b00000000000000000000000000000000 =
|
||||||
1>
|
b00000000000000000000000000000000 >
|
||||||
|
b00000000000000000000000000000010 ?
|
||||||
|
b00000000000000000000000000000011 @
|
||||||
|
1A
|
||||||
#10
|
#10
|
||||||
b00000000000000000000000000000101 ;
|
b00000000000000000000000000000101 >
|
||||||
b00000000000000000000000000000101 :
|
b00000000000000000000000000000101 =
|
||||||
b111 9
|
b111 9
|
||||||
b00000000000000000000000000000010 8
|
b00000000000000000000000000000010 8
|
||||||
b00000000000000000000000000000001 7
|
b00000000000000000000000000000001 7
|
||||||
|
|
@ -134,14 +140,14 @@ b0000000000000000000000000000001000000000000000000000000011111101 6
|
||||||
b00000000000000000000000000000010 7
|
b00000000000000000000000000000010 7
|
||||||
b00000000000000000000000000000100 8
|
b00000000000000000000000000000100 8
|
||||||
b110 9
|
b110 9
|
||||||
b00000000000000000000000000000101 :
|
b00000000000000000000000000000101 =
|
||||||
b00000000000000000000000000000101 ;
|
b00000000000000000000000000000101 >
|
||||||
#25
|
#25
|
||||||
0!
|
0!
|
||||||
#30
|
#30
|
||||||
1!
|
1!
|
||||||
b00000000000000000000000000000101 ;
|
b00000000000000000000000000000101 >
|
||||||
b00000000000000000000000000000101 :
|
b00000000000000000000000000000101 =
|
||||||
b101 9
|
b101 9
|
||||||
b00000000000000000000000000000110 8
|
b00000000000000000000000000000110 8
|
||||||
b00000000000000000000000000000011 7
|
b00000000000000000000000000000011 7
|
||||||
|
|
@ -182,14 +188,14 @@ b0000000000000000000000000000010000000000000000000000000011111011 6
|
||||||
b00000000000000000000000000000100 7
|
b00000000000000000000000000000100 7
|
||||||
b00000000000000000000000000001000 8
|
b00000000000000000000000000001000 8
|
||||||
b100 9
|
b100 9
|
||||||
b00000000000000000000000000000101 :
|
b00000000000000000000000000000101 =
|
||||||
b00000000000000000000000000000101 ;
|
b00000000000000000000000000000101 >
|
||||||
#45
|
#45
|
||||||
0!
|
0!
|
||||||
#50
|
#50
|
||||||
1!
|
1!
|
||||||
b00000000000000000000000000000101 ;
|
b00000000000000000000000000000101 >
|
||||||
b00000000000000000000000000000101 :
|
b00000000000000000000000000000101 =
|
||||||
b011 9
|
b011 9
|
||||||
b00000000000000000000000000001010 8
|
b00000000000000000000000000001010 8
|
||||||
b00000000000000000000000000000101 7
|
b00000000000000000000000000000101 7
|
||||||
|
|
@ -230,5 +236,5 @@ b0000000000000000000000000000011000000000000000000000000011111001 6
|
||||||
b00000000000000000000000000000110 7
|
b00000000000000000000000000000110 7
|
||||||
b00000000000000000000000000001100 8
|
b00000000000000000000000000001100 8
|
||||||
b010 9
|
b010 9
|
||||||
b00000000000000000000000000000101 :
|
b00000000000000000000000000000101 =
|
||||||
b00000000000000000000000000000101 ;
|
b00000000000000000000000000000101 >
|
||||||
|
|
|
||||||
|
|
@ -1,49 +1,52 @@
|
||||||
$version Generated by VerilatedVcd $end
|
$version Generated by VerilatedVcd $end
|
||||||
$date Wed May 1 19:09:21 2019
|
$date Wed Jan 8 07:26:16 2020
|
||||||
$end
|
$end
|
||||||
$timescale 1ns $end
|
$timescale 1ns $end
|
||||||
|
|
||||||
$scope module top $end
|
$scope module top $end
|
||||||
$var wire 1 < clk $end
|
$var wire 1 /" clk $end
|
||||||
$scope module $unit $end
|
$scope module $unit $end
|
||||||
$var wire 1 # global_bit $end
|
$var wire 1 # global_bit $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module t $end
|
$scope module t $end
|
||||||
$var wire 1 < clk $end
|
$var wire 1 /" clk $end
|
||||||
$var wire 32 $ cyc [31:0] $end
|
$var wire 32 + cyc [31:0] $end
|
||||||
$var real 64 3 v_arr_real(0) $end
|
$var wire 8 h" unpacked_array(-1) [7:0] $end
|
||||||
$var real 64 5 v_arr_real(1) $end
|
$var wire 8 g" unpacked_array(-2) [7:0] $end
|
||||||
$var wire 2 * v_arrp [2:1] $end
|
$var wire 8 i" unpacked_array(0) [7:0] $end
|
||||||
$var wire 4 + v_arrp_arrp [3:0] $end
|
$var real 64 E! v_arr_real(0) $end
|
||||||
$var wire 4 , v_arrp_strp [3:0] $end
|
$var real 64 G! v_arr_real(1) $end
|
||||||
$var wire 1 = v_arru(1) $end
|
$var wire 2 [ v_arrp [2:1] $end
|
||||||
$var wire 1 > v_arru(2) $end
|
$var wire 4 c v_arrp_arrp [3:0] $end
|
||||||
$var wire 2 - v_arru_arrp(3) [2:1] $end
|
$var wire 4 k v_arrp_strp [3:0] $end
|
||||||
$var wire 2 . v_arru_arrp(4) [2:1] $end
|
$var wire 1 7" v_arru(1) $end
|
||||||
$var wire 1 ? v_arru_arru(3)(1) $end
|
$var wire 1 8" v_arru(2) $end
|
||||||
$var wire 1 @ v_arru_arru(3)(2) $end
|
$var wire 2 s v_arru_arrp(3) [2:1] $end
|
||||||
$var wire 1 A v_arru_arru(4)(1) $end
|
$var wire 2 t v_arru_arrp(4) [2:1] $end
|
||||||
$var wire 1 B v_arru_arru(4)(2) $end
|
$var wire 1 G" v_arru_arru(3)(1) $end
|
||||||
$var wire 2 / v_arru_strp(3) [1:0] $end
|
$var wire 1 O" v_arru_arru(3)(2) $end
|
||||||
$var wire 2 0 v_arru_strp(4) [1:0] $end
|
$var wire 1 W" v_arru_arru(4)(1) $end
|
||||||
$var wire 3 9 v_enumb [2:0] $end
|
$var wire 1 _" v_arru_arru(4)(2) $end
|
||||||
$var wire 32 7 v_enumed [31:0] $end
|
$var wire 2 %! v_arru_strp(3) [1:0] $end
|
||||||
$var wire 32 8 v_enumed2 [31:0] $end
|
$var wire 2 -! v_arru_strp(4) [1:0] $end
|
||||||
$var real 64 1 v_real $end
|
$var wire 3 u! v_enumb [2:0] $end
|
||||||
$var wire 64 % v_str32x2 [63:0] $end
|
$var wire 32 e! v_enumed [31:0] $end
|
||||||
$var wire 2 ' v_strp [1:0] $end
|
$var wire 32 m! v_enumed2 [31:0] $end
|
||||||
$var wire 4 ( v_strp_strp [3:0] $end
|
$var real 64 5! v_real $end
|
||||||
$var wire 2 ) v_unip_strp [1:0] $end
|
$var wire 64 3 v_str32x2 [63:0] $end
|
||||||
|
$var wire 2 C v_strp [1:0] $end
|
||||||
|
$var wire 4 K v_strp_strp [3:0] $end
|
||||||
|
$var wire 2 S v_unip_strp [1:0] $end
|
||||||
$scope module p2 $end
|
$scope module p2 $end
|
||||||
$var wire 32 C PARAM [31:0] $end
|
$var wire 32 !# PARAM [31:0] $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module p3 $end
|
$scope module p3 $end
|
||||||
$var wire 32 D PARAM [31:0] $end
|
$var wire 32 )# PARAM [31:0] $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module unnamedblk1 $end
|
$scope module unnamedblk1 $end
|
||||||
$var wire 32 : b [31:0] $end
|
$var wire 32 }! b [31:0] $end
|
||||||
$scope module unnamedblk2 $end
|
$scope module unnamedblk2 $end
|
||||||
$var wire 32 ; a [31:0] $end
|
$var wire 32 '" a [31:0] $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
|
|
@ -53,164 +56,167 @@ $enddefinitions $end
|
||||||
|
|
||||||
#0
|
#0
|
||||||
1#
|
1#
|
||||||
b00000000000000000000000000000000 $
|
b00000000000000000000000000000000 +
|
||||||
b0000000000000000000000000000000000000000000000000000000011111111 %
|
b0000000000000000000000000000000000000000000000000000000011111111 3
|
||||||
b00 '
|
b00 C
|
||||||
b0000 (
|
b0000 K
|
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b00 )
|
b00 S
|
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b00 *
|
b00 [
|
||||||
b0000 +
|
b0000 c
|
||||||
b0000 ,
|
b0000 k
|
||||||
b00 -
|
b00 s
|
||||||
b00 .
|
b00 t
|
||||||
b00 /
|
b00 %!
|
||||||
b00 0
|
b00 -!
|
||||||
r0 1
|
r0 5!
|
||||||
r0 3
|
r0 E!
|
||||||
r0 5
|
r0 G!
|
||||||
b00000000000000000000000000000000 7
|
b00000000000000000000000000000000 e!
|
||||||
b00000000000000000000000000000000 8
|
b00000000000000000000000000000000 m!
|
||||||
b000 9
|
b000 u!
|
||||||
b00000000000000000000000000000000 :
|
b00000000000000000000000000000000 }!
|
||||||
b00000000000000000000000000000000 ;
|
b00000000000000000000000000000000 '"
|
||||||
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|
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|
||||||
0=
|
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|
||||||
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|
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|
||||||
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|
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|
||||||
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|
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|
||||||
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|
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|
||||||
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|
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|
||||||
b00000000000000000000000000000010 C
|
b00000000 g"
|
||||||
b00000000000000000000000000000011 D
|
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|
||||||
|
b00000000 i"
|
||||||
|
b00000000000000000000000000000010 !#
|
||||||
|
b00000000000000000000000000000011 )#
|
||||||
#10
|
#10
|
||||||
b00000000000000000000000000000001 $
|
b00000000000000000000000000000001 +
|
||||||
b0000000000000000000000000000000100000000000000000000000011111110 %
|
b0000000000000000000000000000000100000000000000000000000011111110 3
|
||||||
b11 '
|
b11 C
|
||||||
b1111 (
|
b1111 K
|
||||||
b11 )
|
b11 S
|
||||||
b11 *
|
b11 [
|
||||||
b1111 +
|
b1111 c
|
||||||
b1111 ,
|
b1111 k
|
||||||
b11 -
|
b11 s
|
||||||
b11 .
|
b11 t
|
||||||
b11 /
|
b11 %!
|
||||||
b11 0
|
b11 -!
|
||||||
r0.1 1
|
r0.1 5!
|
||||||
r0.2 3
|
r0.2 E!
|
||||||
r0.3 5
|
r0.3 G!
|
||||||
b00000000000000000000000000000001 7
|
b00000000000000000000000000000001 e!
|
||||||
b00000000000000000000000000000010 8
|
b00000000000000000000000000000010 m!
|
||||||
b111 9
|
b111 u!
|
||||||
b00000000000000000000000000000101 :
|
b00000000000000000000000000000101 }!
|
||||||
b00000000000000000000000000000101 ;
|
b00000000000000000000000000000101 '"
|
||||||
1<
|
1/"
|
||||||
#15
|
#15
|
||||||
0<
|
0/"
|
||||||
#20
|
#20
|
||||||
b00000000000000000000000000000010 $
|
b00000000000000000000000000000010 +
|
||||||
b0000000000000000000000000000001000000000000000000000000011111101 %
|
b0000000000000000000000000000001000000000000000000000000011111101 3
|
||||||
b00 '
|
b00 C
|
||||||
b0000 (
|
b0000 K
|
||||||
b00 )
|
b00 S
|
||||||
b00 *
|
b00 [
|
||||||
b0000 +
|
b0000 c
|
||||||
b0000 ,
|
b0000 k
|
||||||
b00 -
|
b00 s
|
||||||
b00 .
|
b00 t
|
||||||
b00 /
|
b00 %!
|
||||||
b00 0
|
b00 -!
|
||||||
r0.2 1
|
r0.2 5!
|
||||||
r0.4 3
|
r0.4 E!
|
||||||
r0.6 5
|
r0.6 G!
|
||||||
b00000000000000000000000000000010 7
|
b00000000000000000000000000000010 e!
|
||||||
b00000000000000000000000000000100 8
|
b00000000000000000000000000000100 m!
|
||||||
b110 9
|
b110 u!
|
||||||
1<
|
1/"
|
||||||
#25
|
#25
|
||||||
0<
|
0/"
|
||||||
#30
|
#30
|
||||||
b00000000000000000000000000000011 $
|
b00000000000000000000000000000011 +
|
||||||
b0000000000000000000000000000001100000000000000000000000011111100 %
|
b0000000000000000000000000000001100000000000000000000000011111100 3
|
||||||
b11 '
|
b11 C
|
||||||
b1111 (
|
b1111 K
|
||||||
b11 )
|
b11 S
|
||||||
b11 *
|
b11 [
|
||||||
b1111 +
|
b1111 c
|
||||||
b1111 ,
|
b1111 k
|
||||||
b11 -
|
b11 s
|
||||||
b11 .
|
b11 t
|
||||||
b11 /
|
b11 %!
|
||||||
b11 0
|
b11 -!
|
||||||
r0.3 1
|
r0.3 5!
|
||||||
r0.6000000000000001 3
|
r0.6000000000000001 E!
|
||||||
r0.8999999999999999 5
|
r0.8999999999999999 G!
|
||||||
b00000000000000000000000000000011 7
|
b00000000000000000000000000000011 e!
|
||||||
b00000000000000000000000000000110 8
|
b00000000000000000000000000000110 m!
|
||||||
b101 9
|
b101 u!
|
||||||
1<
|
1/"
|
||||||
#35
|
#35
|
||||||
0<
|
0/"
|
||||||
#40
|
#40
|
||||||
b00000000000000000000000000000100 $
|
b00000000000000000000000000000100 +
|
||||||
b0000000000000000000000000000010000000000000000000000000011111011 %
|
b0000000000000000000000000000010000000000000000000000000011111011 3
|
||||||
b00 '
|
b00 C
|
||||||
b0000 (
|
b0000 K
|
||||||
b00 )
|
b00 S
|
||||||
b00 *
|
b00 [
|
||||||
b0000 +
|
b0000 c
|
||||||
b0000 ,
|
b0000 k
|
||||||
b00 -
|
b00 s
|
||||||
b00 .
|
b00 t
|
||||||
b00 /
|
b00 %!
|
||||||
b00 0
|
b00 -!
|
||||||
r0.4 1
|
r0.4 5!
|
||||||
r0.8 3
|
r0.8 E!
|
||||||
r1.2 5
|
r1.2 G!
|
||||||
b00000000000000000000000000000100 7
|
b00000000000000000000000000000100 e!
|
||||||
b00000000000000000000000000001000 8
|
b00000000000000000000000000001000 m!
|
||||||
b100 9
|
b100 u!
|
||||||
1<
|
1/"
|
||||||
#45
|
#45
|
||||||
0<
|
0/"
|
||||||
#50
|
#50
|
||||||
b00000000000000000000000000000101 $
|
b00000000000000000000000000000101 +
|
||||||
b0000000000000000000000000000010100000000000000000000000011111010 %
|
b0000000000000000000000000000010100000000000000000000000011111010 3
|
||||||
b11 '
|
b11 C
|
||||||
b1111 (
|
b1111 K
|
||||||
b11 )
|
b11 S
|
||||||
b11 *
|
b11 [
|
||||||
b1111 +
|
b1111 c
|
||||||
b1111 ,
|
b1111 k
|
||||||
b11 -
|
b11 s
|
||||||
b11 .
|
b11 t
|
||||||
b11 /
|
b11 %!
|
||||||
b11 0
|
b11 -!
|
||||||
r0.5 1
|
r0.5 5!
|
||||||
r1 3
|
r1 E!
|
||||||
r1.5 5
|
r1.5 G!
|
||||||
b00000000000000000000000000000101 7
|
b00000000000000000000000000000101 e!
|
||||||
b00000000000000000000000000001010 8
|
b00000000000000000000000000001010 m!
|
||||||
b011 9
|
b011 u!
|
||||||
1<
|
1/"
|
||||||
#55
|
#55
|
||||||
0<
|
0/"
|
||||||
#60
|
#60
|
||||||
b00000000000000000000000000000110 $
|
b00000000000000000000000000000110 +
|
||||||
b0000000000000000000000000000011000000000000000000000000011111001 %
|
b0000000000000000000000000000011000000000000000000000000011111001 3
|
||||||
b00 '
|
b00 C
|
||||||
b0000 (
|
b0000 K
|
||||||
b00 )
|
b00 S
|
||||||
b00 *
|
b00 [
|
||||||
b0000 +
|
b0000 c
|
||||||
b0000 ,
|
b0000 k
|
||||||
b00 -
|
b00 s
|
||||||
b00 .
|
b00 t
|
||||||
b00 /
|
b00 %!
|
||||||
b00 0
|
b00 -!
|
||||||
r0.6 1
|
r0.6 5!
|
||||||
r1.2 3
|
r1.2 E!
|
||||||
r1.8 5
|
r1.8 G!
|
||||||
b00000000000000000000000000000110 7
|
b00000000000000000000000000000110 e!
|
||||||
b00000000000000000000000000001100 8
|
b00000000000000000000000000001100 m!
|
||||||
b010 9
|
b010 u!
|
||||||
1<
|
1/"
|
||||||
|
|
|
||||||
|
|
@ -1,5 +1,5 @@
|
||||||
$date
|
$date
|
||||||
Wed May 1 19:09:23 2019
|
Wed Jan 8 07:26:17 2020
|
||||||
|
|
||||||
$end
|
$end
|
||||||
$version
|
$version
|
||||||
|
|
@ -41,21 +41,24 @@ $var logic 32 8 v_enumed2 $end
|
||||||
$attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end
|
$attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end
|
||||||
$attrbegin misc 07 "" 2 $end
|
$attrbegin misc 07 "" 2 $end
|
||||||
$var logic 3 9 v_enumb $end
|
$var logic 3 9 v_enumb $end
|
||||||
|
$var logic 8 : unpacked_array(-2) $end
|
||||||
|
$var logic 8 ; unpacked_array(-1) $end
|
||||||
|
$var logic 8 < unpacked_array(0) $end
|
||||||
$scope module unnamedblk1 $end
|
$scope module unnamedblk1 $end
|
||||||
$var integer 32 : b $end
|
$var integer 32 = b $end
|
||||||
$scope module unnamedblk2 $end
|
$scope module unnamedblk2 $end
|
||||||
$var integer 32 ; a $end
|
$var integer 32 > a $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module p2 $end
|
$scope module p2 $end
|
||||||
$var parameter 32 < PARAM $end
|
$var parameter 32 ? PARAM $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module p3 $end
|
$scope module p3 $end
|
||||||
$var parameter 32 = PARAM $end
|
$var parameter 32 @ PARAM $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module $unit $end
|
$scope module $unit $end
|
||||||
$var bit 1 > global_bit $end
|
$var bit 1 A global_bit $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$enddefinitions $end
|
$enddefinitions $end
|
||||||
|
|
@ -85,14 +88,17 @@ b0000000000000000000000000000000000000000000000000000000011111111 6
|
||||||
b00000000000000000000000000000000 7
|
b00000000000000000000000000000000 7
|
||||||
b00000000000000000000000000000000 8
|
b00000000000000000000000000000000 8
|
||||||
b000 9
|
b000 9
|
||||||
b00000000000000000000000000000000 :
|
b00000000 :
|
||||||
b00000000000000000000000000000000 ;
|
b00000000 ;
|
||||||
b00000000000000000000000000000010 <
|
b00000000 <
|
||||||
b00000000000000000000000000000011 =
|
b00000000000000000000000000000000 =
|
||||||
1>
|
b00000000000000000000000000000000 >
|
||||||
|
b00000000000000000000000000000010 ?
|
||||||
|
b00000000000000000000000000000011 @
|
||||||
|
1A
|
||||||
#10
|
#10
|
||||||
b00000000000000000000000000000101 ;
|
b00000000000000000000000000000101 >
|
||||||
b00000000000000000000000000000101 :
|
b00000000000000000000000000000101 =
|
||||||
b111 9
|
b111 9
|
||||||
b00000000000000000000000000000010 8
|
b00000000000000000000000000000010 8
|
||||||
b00000000000000000000000000000001 7
|
b00000000000000000000000000000001 7
|
||||||
|
|
@ -134,14 +140,14 @@ b0000000000000000000000000000001000000000000000000000000011111101 6
|
||||||
b00000000000000000000000000000010 7
|
b00000000000000000000000000000010 7
|
||||||
b00000000000000000000000000000100 8
|
b00000000000000000000000000000100 8
|
||||||
b110 9
|
b110 9
|
||||||
b00000000000000000000000000000101 :
|
b00000000000000000000000000000101 =
|
||||||
b00000000000000000000000000000101 ;
|
b00000000000000000000000000000101 >
|
||||||
#25
|
#25
|
||||||
0!
|
0!
|
||||||
#30
|
#30
|
||||||
1!
|
1!
|
||||||
b00000000000000000000000000000101 ;
|
b00000000000000000000000000000101 >
|
||||||
b00000000000000000000000000000101 :
|
b00000000000000000000000000000101 =
|
||||||
b101 9
|
b101 9
|
||||||
b00000000000000000000000000000110 8
|
b00000000000000000000000000000110 8
|
||||||
b00000000000000000000000000000011 7
|
b00000000000000000000000000000011 7
|
||||||
|
|
@ -182,14 +188,14 @@ b0000000000000000000000000000010000000000000000000000000011111011 6
|
||||||
b00000000000000000000000000000100 7
|
b00000000000000000000000000000100 7
|
||||||
b00000000000000000000000000001000 8
|
b00000000000000000000000000001000 8
|
||||||
b100 9
|
b100 9
|
||||||
b00000000000000000000000000000101 :
|
b00000000000000000000000000000101 =
|
||||||
b00000000000000000000000000000101 ;
|
b00000000000000000000000000000101 >
|
||||||
#45
|
#45
|
||||||
0!
|
0!
|
||||||
#50
|
#50
|
||||||
1!
|
1!
|
||||||
b00000000000000000000000000000101 ;
|
b00000000000000000000000000000101 >
|
||||||
b00000000000000000000000000000101 :
|
b00000000000000000000000000000101 =
|
||||||
b011 9
|
b011 9
|
||||||
b00000000000000000000000000001010 8
|
b00000000000000000000000000001010 8
|
||||||
b00000000000000000000000000000101 7
|
b00000000000000000000000000000101 7
|
||||||
|
|
@ -230,5 +236,5 @@ b0000000000000000000000000000011000000000000000000000000011111001 6
|
||||||
b00000000000000000000000000000110 7
|
b00000000000000000000000000000110 7
|
||||||
b00000000000000000000000000001100 8
|
b00000000000000000000000000001100 8
|
||||||
b010 9
|
b010 9
|
||||||
b00000000000000000000000000000101 :
|
b00000000000000000000000000000101 =
|
||||||
b00000000000000000000000000000101 ;
|
b00000000000000000000000000000101 >
|
||||||
|
|
|
||||||
|
|
@ -1,83 +1,86 @@
|
||||||
$version Generated by VerilatedVcd $end
|
$version Generated by VerilatedVcd $end
|
||||||
$date Wed May 1 19:09:26 2019
|
$date Wed Jan 8 07:26:19 2020
|
||||||
$end
|
$end
|
||||||
$timescale 1ns $end
|
$timescale 1ns $end
|
||||||
|
|
||||||
$scope module top $end
|
$scope module top $end
|
||||||
$var wire 1 G clk $end
|
$var wire 1 )# clk $end
|
||||||
$scope module $unit $end
|
$scope module $unit $end
|
||||||
$var wire 1 # global_bit $end
|
$var wire 1 # global_bit $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module t $end
|
$scope module t $end
|
||||||
$var wire 1 G clk $end
|
$var wire 1 )# clk $end
|
||||||
$var wire 32 $ cyc [31:0] $end
|
$var wire 32 + cyc [31:0] $end
|
||||||
$var real 64 > v_arr_real(0) $end
|
$var wire 8 b# unpacked_array(-1) [7:0] $end
|
||||||
$var real 64 @ v_arr_real(1) $end
|
$var wire 8 a# unpacked_array(-2) [7:0] $end
|
||||||
$var wire 2 / v_arrp [2:1] $end
|
$var wire 8 c# unpacked_array(0) [7:0] $end
|
||||||
$var wire 2 0 v_arrp_arrp(3) [1:0] $end
|
$var real 64 ?" v_arr_real(0) $end
|
||||||
$var wire 2 1 v_arrp_arrp(4) [1:0] $end
|
$var real 64 A" v_arr_real(1) $end
|
||||||
$var wire 1 H v_arru(1) $end
|
$var wire 2 %! v_arrp [2:1] $end
|
||||||
$var wire 1 I v_arru(2) $end
|
$var wire 2 -! v_arrp_arrp(3) [1:0] $end
|
||||||
$var wire 2 6 v_arru_arrp(3) [2:1] $end
|
$var wire 2 5! v_arrp_arrp(4) [1:0] $end
|
||||||
$var wire 2 7 v_arru_arrp(4) [2:1] $end
|
$var wire 1 1# v_arru(1) $end
|
||||||
$var wire 1 J v_arru_arru(3)(1) $end
|
$var wire 1 2# v_arru(2) $end
|
||||||
$var wire 1 K v_arru_arru(3)(2) $end
|
$var wire 2 ]! v_arru_arrp(3) [2:1] $end
|
||||||
$var wire 1 L v_arru_arru(4)(1) $end
|
$var wire 2 ^! v_arru_arrp(4) [2:1] $end
|
||||||
$var wire 1 M v_arru_arru(4)(2) $end
|
$var wire 1 A# v_arru_arru(3)(1) $end
|
||||||
$var wire 3 D v_enumb [2:0] $end
|
$var wire 1 I# v_arru_arru(3)(2) $end
|
||||||
$var wire 32 B v_enumed [31:0] $end
|
$var wire 1 Q# v_arru_arru(4)(1) $end
|
||||||
$var wire 32 C v_enumed2 [31:0] $end
|
$var wire 1 Y# v_arru_arru(4)(2) $end
|
||||||
$var real 64 < v_real $end
|
$var wire 3 o" v_enumb [2:0] $end
|
||||||
|
$var wire 32 _" v_enumed [31:0] $end
|
||||||
|
$var wire 32 g" v_enumed2 [31:0] $end
|
||||||
|
$var real 64 /" v_real $end
|
||||||
$scope module unnamedblk1 $end
|
$scope module unnamedblk1 $end
|
||||||
$var wire 32 E b [31:0] $end
|
$var wire 32 w" b [31:0] $end
|
||||||
$scope module unnamedblk2 $end
|
$scope module unnamedblk2 $end
|
||||||
$var wire 32 F a [31:0] $end
|
$var wire 32 !# a [31:0] $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module v_arrp_strp(3) $end
|
$scope module v_arrp_strp(3) $end
|
||||||
$var wire 1 3 b0 $end
|
$var wire 1 E! b0 $end
|
||||||
$var wire 1 2 b1 $end
|
$var wire 1 =! b1 $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module v_arrp_strp(4) $end
|
$scope module v_arrp_strp(4) $end
|
||||||
$var wire 1 5 b0 $end
|
$var wire 1 U! b0 $end
|
||||||
$var wire 1 4 b1 $end
|
$var wire 1 M! b1 $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module v_arru_strp(3) $end
|
$scope module v_arru_strp(3) $end
|
||||||
$var wire 1 9 b0 $end
|
$var wire 1 u! b0 $end
|
||||||
$var wire 1 8 b1 $end
|
$var wire 1 m! b1 $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module v_arru_strp(4) $end
|
$scope module v_arru_strp(4) $end
|
||||||
$var wire 1 ; b0 $end
|
$var wire 1 '" b0 $end
|
||||||
$var wire 1 : b1 $end
|
$var wire 1 }! b1 $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module v_str32x2(0) $end
|
$scope module v_str32x2(0) $end
|
||||||
$var wire 32 % data [31:0] $end
|
$var wire 32 3 data [31:0] $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module v_str32x2(1) $end
|
$scope module v_str32x2(1) $end
|
||||||
$var wire 32 & data [31:0] $end
|
$var wire 32 ; data [31:0] $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module v_strp $end
|
$scope module v_strp $end
|
||||||
$var wire 1 ( b0 $end
|
$var wire 1 K b0 $end
|
||||||
$var wire 1 ' b1 $end
|
$var wire 1 C b1 $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module v_strp_strp $end
|
$scope module v_strp_strp $end
|
||||||
$scope module x0 $end
|
$scope module x0 $end
|
||||||
$var wire 1 , b0 $end
|
$var wire 1 k b0 $end
|
||||||
$var wire 1 + b1 $end
|
$var wire 1 c b1 $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module x1 $end
|
$scope module x1 $end
|
||||||
$var wire 1 * b0 $end
|
$var wire 1 [ b0 $end
|
||||||
$var wire 1 ) b1 $end
|
$var wire 1 S b1 $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module v_unip_strp $end
|
$scope module v_unip_strp $end
|
||||||
$scope module x0 $end
|
$scope module x0 $end
|
||||||
$var wire 1 . b0 $end
|
$var wire 1 { b0 $end
|
||||||
$var wire 1 - b1 $end
|
$var wire 1 s b1 $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module x1 $end
|
$scope module x1 $end
|
||||||
$var wire 1 . b0 $end
|
$var wire 1 { b0 $end
|
||||||
$var wire 1 - b1 $end
|
$var wire 1 s b1 $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
|
|
@ -87,246 +90,249 @@ $enddefinitions $end
|
||||||
|
|
||||||
#0
|
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|
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|
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|
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b00000000000000000000000000000001 $
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b00000000000000000000000000000010 $
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|
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|
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|
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b00000000000000000000000000000100 $
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|
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|
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|
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|
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|
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|
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r0.4 <
|
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|
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|
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|
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|
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b00000000000000000000000000000101 $
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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19
|
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|
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|
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|
||||||
1;
|
1'"
|
||||||
r0.5 <
|
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|
||||||
r1 >
|
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|
||||||
r1.5 @
|
r1.5 A"
|
||||||
b00000000000000000000000000000101 B
|
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|
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|
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|
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|
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|
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|
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|
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|
||||||
0G
|
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|
||||||
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|
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|
||||||
b00000000000000000000000000000110 $
|
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|
||||||
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|
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|
||||||
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|
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|
||||||
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|
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|
||||||
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|
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|
||||||
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|
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|
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|
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|
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|
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|
||||||
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|
0k
|
||||||
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|
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|
||||||
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|
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|
||||||
b00 /
|
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|
||||||
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|
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|
||||||
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|
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|
||||||
02
|
0=!
|
||||||
03
|
0E!
|
||||||
04
|
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|
||||||
05
|
0U!
|
||||||
b00 6
|
b00 ]!
|
||||||
b00 7
|
b00 ^!
|
||||||
08
|
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|
||||||
09
|
0u!
|
||||||
0:
|
0}!
|
||||||
0;
|
0'"
|
||||||
r0.6 <
|
r0.6 /"
|
||||||
r1.2 >
|
r1.2 ?"
|
||||||
r1.8 @
|
r1.8 A"
|
||||||
b00000000000000000000000000000110 B
|
b00000000000000000000000000000110 _"
|
||||||
b00000000000000000000000000001100 C
|
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|
||||||
b010 D
|
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|
||||||
1G
|
1)#
|
||||||
|
|
|
||||||
|
|
@ -1,5 +1,5 @@
|
||||||
$date
|
$date
|
||||||
Wed May 1 19:09:29 2019
|
Wed Jan 8 07:26:20 2020
|
||||||
|
|
||||||
$end
|
$end
|
||||||
$version
|
$version
|
||||||
|
|
@ -81,15 +81,18 @@ $var logic 32 D v_enumed2 $end
|
||||||
$attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end
|
$attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end
|
||||||
$attrbegin misc 07 "" 2 $end
|
$attrbegin misc 07 "" 2 $end
|
||||||
$var logic 3 E v_enumb $end
|
$var logic 3 E v_enumb $end
|
||||||
|
$var logic 8 F unpacked_array(-2) $end
|
||||||
|
$var logic 8 G unpacked_array(-1) $end
|
||||||
|
$var logic 8 H unpacked_array(0) $end
|
||||||
$scope module unnamedblk1 $end
|
$scope module unnamedblk1 $end
|
||||||
$var integer 32 F b $end
|
$var integer 32 I b $end
|
||||||
$scope module unnamedblk2 $end
|
$scope module unnamedblk2 $end
|
||||||
$var integer 32 G a $end
|
$var integer 32 J a $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$scope module $unit $end
|
$scope module $unit $end
|
||||||
$var bit 1 H global_bit $end
|
$var bit 1 K global_bit $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$upscope $end
|
$upscope $end
|
||||||
$enddefinitions $end
|
$enddefinitions $end
|
||||||
|
|
@ -131,12 +134,15 @@ b00000000000000000000000000000000 B
|
||||||
b00000000000000000000000000000000 C
|
b00000000000000000000000000000000 C
|
||||||
b00000000000000000000000000000000 D
|
b00000000000000000000000000000000 D
|
||||||
b000 E
|
b000 E
|
||||||
b00000000000000000000000000000000 F
|
b00000000 F
|
||||||
b00000000000000000000000000000000 G
|
b00000000 G
|
||||||
1H
|
b00000000 H
|
||||||
|
b00000000000000000000000000000000 I
|
||||||
|
b00000000000000000000000000000000 J
|
||||||
|
1K
|
||||||
#10
|
#10
|
||||||
b00000000000000000000000000000101 G
|
b00000000000000000000000000000101 J
|
||||||
b00000000000000000000000000000101 F
|
b00000000000000000000000000000101 I
|
||||||
b111 E
|
b111 E
|
||||||
b00000000000000000000000000000010 D
|
b00000000000000000000000000000010 D
|
||||||
b00000000000000000000000000000001 C
|
b00000000000000000000000000000001 C
|
||||||
|
|
@ -202,14 +208,14 @@ b00000000000000000000000000000010 B
|
||||||
b00000000000000000000000000000010 C
|
b00000000000000000000000000000010 C
|
||||||
b00000000000000000000000000000100 D
|
b00000000000000000000000000000100 D
|
||||||
b110 E
|
b110 E
|
||||||
b00000000000000000000000000000101 F
|
b00000000000000000000000000000101 I
|
||||||
b00000000000000000000000000000101 G
|
b00000000000000000000000000000101 J
|
||||||
#25
|
#25
|
||||||
0!
|
0!
|
||||||
#30
|
#30
|
||||||
1!
|
1!
|
||||||
b00000000000000000000000000000101 G
|
b00000000000000000000000000000101 J
|
||||||
b00000000000000000000000000000101 F
|
b00000000000000000000000000000101 I
|
||||||
b101 E
|
b101 E
|
||||||
b00000000000000000000000000000110 D
|
b00000000000000000000000000000110 D
|
||||||
b00000000000000000000000000000011 C
|
b00000000000000000000000000000011 C
|
||||||
|
|
@ -274,14 +280,14 @@ b00000000000000000000000000000100 B
|
||||||
b00000000000000000000000000000100 C
|
b00000000000000000000000000000100 C
|
||||||
b00000000000000000000000000001000 D
|
b00000000000000000000000000001000 D
|
||||||
b100 E
|
b100 E
|
||||||
b00000000000000000000000000000101 F
|
b00000000000000000000000000000101 I
|
||||||
b00000000000000000000000000000101 G
|
b00000000000000000000000000000101 J
|
||||||
#45
|
#45
|
||||||
0!
|
0!
|
||||||
#50
|
#50
|
||||||
1!
|
1!
|
||||||
b00000000000000000000000000000101 G
|
b00000000000000000000000000000101 J
|
||||||
b00000000000000000000000000000101 F
|
b00000000000000000000000000000101 I
|
||||||
b011 E
|
b011 E
|
||||||
b00000000000000000000000000001010 D
|
b00000000000000000000000000001010 D
|
||||||
b00000000000000000000000000000101 C
|
b00000000000000000000000000000101 C
|
||||||
|
|
@ -346,5 +352,5 @@ b00000000000000000000000000000110 B
|
||||||
b00000000000000000000000000000110 C
|
b00000000000000000000000000000110 C
|
||||||
b00000000000000000000000000001100 D
|
b00000000000000000000000000001100 D
|
||||||
b010 E
|
b010 E
|
||||||
b00000000000000000000000000000101 F
|
b00000000000000000000000000000101 I
|
||||||
b00000000000000000000000000000101 G
|
b00000000000000000000000000000101 J
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue