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Generate AstNode accessors via astgen
Introduce the @astgen directives parsed by astgen, currently used for the generation child node (operand) accessors. Please see the updated internal documentation for details.
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+2
-2
@@ -372,7 +372,7 @@ private:
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// lvalue is true, because we know we have a verilator public_flat_rw
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// but someday we may be more general
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const bool lvalue = m_varp->isSigUserRWPublic();
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nodep->addStmtp(
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nodep->addStmtsp(
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new AstVarRef(nodep->fileline(), m_varp, lvalue ? VAccess::WRITE : VAccess::READ));
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}
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}
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@@ -594,7 +594,7 @@ private:
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sensesp->unlinkFrBackWithNext();
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alwaysp->sensesp(sensesp);
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}
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if (nodep->stmtsp()) alwaysp->addStmtp(nodep->stmtsp()->unlinkFrBackWithNext());
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if (nodep->stmtsp()) alwaysp->addStmtsp(nodep->stmtsp()->unlinkFrBackWithNext());
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VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
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}
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}
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