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https://github.com/verilator/verilator.git
synced 2026-09-03 07:33:49 +02:00
Internals: C++11 style cleanups. No functional change.
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+9
-9
@@ -97,9 +97,9 @@ public:
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v3Global.rootp()->typeTablep()->addTypesp(tableDTypep);
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// Create table initializer (with default value 0)
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AstConst* const defaultp = elemDType->isString()
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? new AstConst(m_fl, AstConst::String(), "")
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: new AstConst(m_fl, AstConst::WidthedValue(), width, 0);
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m_initp = new AstInitArray(m_fl, tableDTypep, defaultp);
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? new AstConst{m_fl, AstConst::String(), ""}
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: new AstConst{m_fl, AstConst::WidthedValue(), width, 0};
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m_initp = new AstInitArray{m_fl, tableDTypep, defaultp};
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}
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void addValue(unsigned index, const V3Number& value) {
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@@ -196,7 +196,7 @@ private:
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m_outVarps.clear();
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// Collect stats
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TableSimulateVisitor chkvis(this);
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TableSimulateVisitor chkvis{this};
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chkvis.mainTableCheck(nodep);
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m_assignDly = chkvis.isAssignDly();
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// Also sets m_inWidthBits
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@@ -280,7 +280,7 @@ private:
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// There may be a simulation path by which the output doesn't change value.
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// We could bail on these cases, or we can have a "change it" boolean.
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// We've chosen the latter route, since recirc is common in large FSMs.
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TableSimulateVisitor simvis(this);
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TableSimulateVisitor simvis{this};
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for (uint32_t i = 0; i <= VL_MASK_I(m_inWidthBits); ++i) {
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const uint32_t inValue = i;
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// Make a new simulation structure so we can set new input values
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@@ -354,11 +354,11 @@ private:
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AstVarScope* outputAssignedTableVscp) {
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FileLine* const fl = nodep->fileline();
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for (TableOutputVar& tov : m_outVarps) {
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AstNode* const alhsp = new AstVarRef(fl, tov.varScopep(), VAccess::WRITE);
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AstNode* const alhsp = new AstVarRef{fl, tov.varScopep(), VAccess::WRITE};
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AstNode* const arhsp = select(fl, tov.tabeVarScopep(), indexVscp);
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AstNode* outsetp = m_assignDly
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? static_cast<AstNode*>(new AstAssignDly(fl, alhsp, arhsp))
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: static_cast<AstNode*>(new AstAssign(fl, alhsp, arhsp));
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? static_cast<AstNode*>(new AstAssignDly{fl, alhsp, arhsp})
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: static_cast<AstNode*>(new AstAssign{fl, alhsp, arhsp});
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// If this output is unassigned on some code paths, wrap the assignment in an If
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if (tov.mayBeUnassigned()) {
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@@ -425,6 +425,6 @@ void TableSimulateVisitor::varRefCb(AstVarRef* nodep) {
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void V3Table::tableAll(AstNetlist* nodep) {
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UINFO(2, __FUNCTION__ << ": " << endl);
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{ TableVisitor visitor(nodep); } // Destruct before checking
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{ TableVisitor visitor{nodep}; } // Destruct before checking
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V3Global::dumpCheckGlobalTree("table", 0, v3Global.opt.dumpTreeLevel(__FILE__) >= 3);
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}
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