Less verbosity for IEEE warnings in earlier commit this rev.

src/V3Number.cpp

@@ -139,7 +139,12 @@ V3Number::V3Number (FileLine* fileline, const char* sourcep) {
 		    this->opAdd(product,addend);
 		    if (product.bitsValue(width(), 4)) {  // Overflowed
 			m_fileline->v3error("Too many digits for "<<width()<<" bit number: "<<sourcep);
-			if (!m_sized) m_fileline->v3error("As that number was unsized ('d...) it is limited to 32 bits (IEEE 2012 5.7.1)");
+			if (!m_sized) {
+			    static int warned = false;
+			    if (!warned++) {
+				m_fileline->v3error("As that number was unsized ('d...) it is limited to 32 bits (IEEE 2012 5.7.1)");
+			    }
+			}
 			while (*(cp+1)) cp++;  // Skip ahead so don't get multiple warnings
 		    }
 		}

src/verilog.l

@@ -114,8 +114,11 @@ void yyerror(const char* errmsg) {
     if (0==strncmp(errmsg, colonmsg, strlen(colonmsg))
 	&& PARSEP->prevBisonVal().token == yaID__ETC
 	&& PARSEP->curBisonVal().token == yP_COLONCOLON) {
-	PARSEP->fileline()->v3error("Perhaps '"+*PARSEP->prevBisonVal().strp
+	static int warned = false;
-				    +"' is a package which needs to be predeclared? (IEEE 2012 26.3)");
+	if (!warned++) {
+	    PARSEP->fileline()->v3error("Perhaps '"+*PARSEP->prevBisonVal().strp
+					+"' is a package which needs to be predeclared? (IEEE 2012 26.3)");
+	}
     }
 }
 

test_regress/t/t_lint_pkg_colon_bad.pl

@@ -19,7 +19,6 @@ compile (
 qq{%Error: t/t_lint_pkg_colon_bad.v:6: syntax error, unexpected ::, expecting ')' or ','
 %Error: t/t_lint_pkg_colon_bad.v:6: Perhaps 'mispkg' is a package which needs to be predeclared? (IEEE 2012 26.3)
 %Error: t/t_lint_pkg_colon_bad.v:7: syntax error, unexpected ::, expecting ',' or ';'
-%Error: t/t_lint_pkg_colon_bad.v:7: Perhaps 'mispkgb' is a package which needs to be predeclared? (IEEE 2012 26.3)
 }).'%Error: Exiting due to.*'
     );