Fix randomization of dynamic arrs of objects (#7790)
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@ -4569,6 +4569,16 @@ class RandomizeVisitor final : public VNVisitor {
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}
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}
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static bool isDynArrOfClassTypeRecurse(const AstNodeDType* const dtypep) {
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const AstNodeDType* const refp = dtypep->skipRefp();
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if (VN_IS(refp, DynArrayDType) || VN_IS(refp, QueueDType)) {
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return isDynArrOfClassTypeRecurse(refp->subDTypep());
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} else if (VN_IS(refp, ClassRefDType)) {
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return true;
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}
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return false;
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}
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// VISITORS
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void visit(AstNodeModule* nodep) override {
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VL_RESTORER(m_modp);
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@ -4801,6 +4811,18 @@ class RandomizeVisitor final : public VNVisitor {
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// Refresh array element tables after resize
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for (AstVar* const arrVarp : sizeArraysIt->second) {
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// Array elements of class data type are passed to the solver as separate
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// variables, so passing the original array variable is redundant, because it
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// won't be referenced
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if (isDynArrOfClassTypeRecurse(arrVarp->dtypep())) {
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const uint32_t unpackedDims = arrVarp->dtypep()->dimensions(false).second;
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if (unpackedDims > 1) {
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arrVarp->v3warn(
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E_UNSUPPORTED,
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"Unsupported: Nested array element access in global constraint");
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}
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continue;
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}
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AstCMethodHard* const methodp = new AstCMethodHard{
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fl, new AstVarRef{fl, genModp, genp, VAccess::READWRITE},
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VCMethod::RANDOMIZER_WRITE_VAR};
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@ -0,0 +1,21 @@
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#!/usr/bin/env python3
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# This program is free software; you can redistribute it and/or modify it
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# under the terms of either the GNU Lesser General Public License Version 3
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# or the Perl Artistic License Version 2.0.
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# SPDX-FileCopyrightText: 2025 Wilson Snyder
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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import vltest_bootstrap
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test.scenarios('simulator')
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if not test.have_solver:
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test.skip("No constraint solver installed")
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test.compile()
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test.execute()
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test.passes()
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@ -0,0 +1,37 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain.
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// SPDX-FileCopyrightText: 2026 Antmicro
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// SPDX-License-Identifier: CC0-1.0
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class Foo;
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rand int abcd;
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endclass
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class Bar;
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rand Foo foo_arr[];
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function new();
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foo_arr = new[12];
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foreach(foo_arr[i]) foo_arr[i] = new;
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endfunction
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constraint c {
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foo_arr.size() == 10;
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foreach (foo_arr[i]) foo_arr[i].abcd < 8;
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}
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endclass
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module t;
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Bar bar;
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initial begin
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bar = new();
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bar.randomize();
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if (bar.foo_arr.size() != 10) $stop;
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foreach (bar.foo_arr[i]) begin
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if (bar.foo_arr[i] >= 8) $stop;
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end
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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@ -0,0 +1,6 @@
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%Error-UNSUPPORTED: t/t_constraint_global_cls_arr_2d_unsup.v:13:12: Unsupported: Nested array element access in global constraint
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: ... note: In instance 't'
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13 | rand Foo foo_arr[$][];
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| ^~~~~~~
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... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
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%Error: Exiting due to
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@ -0,0 +1,16 @@
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#!/usr/bin/env python3
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# This program is free software; you can redistribute it and/or modify it
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# under the terms of either the GNU Lesser General Public License Version 3
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# or the Perl Artistic License Version 2.0.
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# SPDX-FileCopyrightText: 2025 Wilson Snyder
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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import vltest_bootstrap
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test.scenarios('vlt')
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test.lint(fails=test.vlt_all, expect_filename=test.golden_filename)
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test.passes()
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@ -0,0 +1,41 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain.
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// SPDX-FileCopyrightText: 2026 Antmicro
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// SPDX-License-Identifier: CC0-1.0
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class Foo;
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rand int abcd;
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constraint c { abcd >= 2; }
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endclass
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class Bar;
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rand Foo foo_arr[$][];
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function new();
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for (int i = 0; i < 3; i++) foo_arr[i] = new[5];
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foreach(foo_arr[i, j]) foo_arr[i][j] = new;
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endfunction
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constraint c {
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foo_arr.size() == 10;
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foreach (foo_arr[i, j]) foo_arr[i][j].abcd < 8;
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}
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endclass
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module t;
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Bar bar;
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initial begin
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bar = new();
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void'(bar.randomize());
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if (bar.foo_arr.size() != 10) $stop;
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foreach (bar.foo_arr[i, j]) begin
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if (bar.foo_arr[i][j].abcd < 2 || bar.foo_arr[i][j].abcd >= 8) $stop;
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end
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for (int i = 3; i < 10; i++) begin
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if (bar.foo_arr[i].size() != 0) $stop;
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end
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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