Add -lint-only option

git-svn-id: file://localhost/svn/verilator/trunk/verilator@910 77ca24e4-aefa-0310-84f0-b9a241c72d87

Changes

@@ -5,6 +5,8 @@ indicates the contributor was also the author of the fix; Thanks!
 
 * Verilator 3.64**
 
+**   Add --lint-only option.
+
 ***  Support SystemVerilog .name and .* interconnect.
 
 ***  Support while and do-while loops.

bin/verilator

@@ -191,6 +191,7 @@ Verilator - Convert Verilog code to C++/SystemC
     verilator --cc [options] [top_level.v] [opt_c_files.cpp/c/cc]
     verilator --sc [options] [top_level.v] [opt_c_files.cpp/c/cc]
     verilator --sp [options] [top_level.v] [opt_c_files.cpp/c/cc]
+    verilator --lint-only ...
 
 =head1 DESCRIPTION
 
@@ -329,6 +330,10 @@ values, or a value <= 1 will inline everything, will lead to longer compile
 times, but potentially faster runtimes.  This setting is ignored for very
 small modules; they will always be inlined, if allowed.
 
+=item --lint-only
+
+Check the files for lint violations only, do not create any other output.
+
 =item --MMD
 
 Enable creation of .d dependency files, used for make dependency detection,

src/V3EmitC.cpp

@@ -594,7 +594,14 @@ class EmitCImp : EmitCStmts {
 	if (filenum) filenameNoExt += "__"+cvtToStr(filenum);
 	filenameNoExt += (slow ? "__Slow":"");
 	V3OutCFile* ofp = NULL;
-	if (optSystemPerl()) {
+	if (v3Global.opt.lintOnly()) {
+	    // Unfortunately we have some lint checks here, so we can't just skip processing.
+	    // We should move them to a different stage.
+	    string filename = "/dev/null";
+	    newCFile(filename, slow, source);
+	    ofp = new V3OutSpFile (filename);
+	}
+	else if (optSystemPerl()) {
 	    string filename = filenameNoExt+".sp";
 	    newCFile(filename, slow, source);
 	    ofp = new V3OutSpFile (filename);

src/V3Options.cpp

@@ -383,6 +383,7 @@ void V3Options::parseOptsList(FileLine* fl, int argc, char** argv) {
 	    else if ( onoff   (sw, "-ignc", flag/*ref*/) )	{ m_ignc = flag; }
 	    else if ( onoff   (sw, "-inhibit-sim", flag/*ref*/)){ m_inhibitSim = flag; }
 	    else if ( onoff   (sw, "-l2name", flag/*ref*/) )	{ m_l2Name = flag; }
+	    else if ( onoff   (sw, "-lint-only", flag/*ref*/) )	{ m_lintOnly = flag; }
 	    else if ( onoff   (sw, "-pins64", flag/*ref*/) )	{ m_pins64 = flag; }
 	    else if ( !strcmp (sw, "-private") )		{ m_public = false; }
 	    else if ( onoff   (sw, "-profile-cfuncs", flag/*ref*/) )	{ m_profileCFuncs = flag; }
@@ -574,6 +575,7 @@ V3Options::V3Options() {
     m_exe = false;
     m_ignc = false;
     m_l2Name = true;
+    m_lintOnly = true;
     m_makeDepend = true;
     m_makePhony = false;
     m_outFormatOk = false;

src/V3Options.h

@@ -56,6 +56,7 @@ class V3Options {
     bool	m_ignc;		// main switch: --ignc
     bool	m_inhibitSim;	// main switch: --inhibit-sim
     bool	m_l2Name;	// main switch: --l2name
+    bool	m_lintOnly;	// main switch: --lint-only
     bool	m_outFormatOk;	// main switch: --cc, --sc or --sp was specified
     bool	m_pins64;	// main switch: --pins64
     bool	m_profileCFuncs;// main switch: --profile-cfuncs
@@ -150,6 +151,7 @@ class V3Options {
     bool psl() const { return m_psl; }
     bool allPublic() const { return m_public; }
     bool l2Name() const { return m_l2Name; }
+    bool lintOnly() const { return m_lintOnly; }
     bool ignc() const { return m_ignc; }
     bool inhibitSim() const { return m_inhibitSim; }
 

src/Verilator.cpp

@@ -449,8 +449,10 @@ void process () {
     V3Error::abortIfErrors();
 
     // Output the text
-    V3EmitC::emitcSyms();
-    V3EmitC::emitcTrace();
+    if (!v3Global.opt.lintOnly()) {
+	V3EmitC::emitcSyms();
+	V3EmitC::emitcTrace();
+    }
     V3EmitC::emitc();
 
     // Statistics
@@ -459,8 +461,10 @@ void process () {
 	V3Stats::statsReport();
     }
 
-    // Makefile must be after all other emitters
-    V3EmitMk::emitmk(v3Global.rootp());
+    if (!v3Global.opt.lintOnly()) {
+	// Makefile must be after all other emitters
+	V3EmitMk::emitmk(v3Global.rootp());
+    }
 }
 
 //######################################################################
@@ -481,7 +485,7 @@ int main(int argc, char** argv, char** env) {
     v3Global.opt.bin(argv[0]);
     string argString = V3Options::argString(argc-1, argv+1);
     v3Global.opt.parseOpts(new FileLine("COMMAND_LINE",0), argc-1, argv+1);
-    if (v3Global.opt.coverage() && !v3Global.opt.systemPerl()) {
+    if (v3Global.opt.coverage() && !v3Global.opt.systemPerl() && !v3Global.opt.lintOnly()) {
 	v3fatal("Unsupported: Coverage analysis requires --sp output.");
     }
     if (!v3Global.opt.outFormatOk() && !v3Global.opt.preprocOnly()) {
@@ -494,6 +498,7 @@ int main(int argc, char** argv, char** env) {
     V3File::addSrcDepend(v3Global.opt.bin());
     if (v3Global.opt.skipIdentical()
 	&& !v3Global.opt.preprocOnly()
+	&& !v3Global.opt.lintOnly()
 	&& V3File::checkTimes(v3Global.opt.makeDir()+"/"+v3Global.opt.prefix()+"__verFiles.dat", argString)) {
 	UINFO(1,"--skip-identical: No change to any source files, exiting\n");
 	exit(0);
@@ -526,10 +531,11 @@ int main(int argc, char** argv, char** env) {
     v3Global.rootp()->dumpTreeFile(v3Global.debugFilename("final.tree",99));
     V3Error::abortIfErrors();
 
-    if (v3Global.opt.makeDepend()) {
+    if (!v3Global.opt.lintOnly() && v3Global.opt.makeDepend()) {
 	V3File::writeDepend(v3Global.opt.makeDir()+"/"+v3Global.opt.prefix()+"__ver.d");
     }
-    if (v3Global.opt.skipIdentical() || v3Global.opt.makeDepend()) { 
+    if (!v3Global.opt.lintOnly()
+	&& (v3Global.opt.skipIdentical() || v3Global.opt.makeDepend())) { 
 	V3File::writeTimes(v3Global.opt.makeDir()+"/"+v3Global.opt.prefix()+"__verFiles.dat", argString);
     }
 

test_regress/t/t_lint_only.pl

@@ -0,0 +1,23 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("./driver.pl", @ARGV, $0); die; }
+# $Id$
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003-2007 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# General Public License or the Perl Artistic License.
+
+compile (
+	 make_top_shell => 0,
+	 make_main => 0,
+	 v_flags2 => ["--lint-only"],
+	 verilator_make_gcc => 0,
+	 ) if $Last_Self->{v3};
+
+foreach my $file (glob("obj_dir/*t_lint_only*")) {
+    next if $file =~ /simx_compile.log/;  # Made by driver.pl, not Verilator
+    $Last_Self->error("%Error: Created $file, but --lint-only shouldn't create files");
+}
+
+ok(1);
+1;

test_regress/t/t_lint_only.v

@@ -0,0 +1,11 @@
+// $Id$
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2006 by Wilson Snyder.
+
+module t ();
+   initial begin
+      $stop;
+   end
+endmodule