Tests: Process/Semaphore/Mailbox testing (all fail until supported)

This commit is contained in:
Wilson Snyder 2022-09-11 13:05:13 -04:00
parent 47262cd4ec
commit 752f425025
15 changed files with 163 additions and 9 deletions

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@ -538,7 +538,7 @@ private:
|| VN_IS(vdtypep, DynArrayDType) //
|| VN_IS(vdtypep, QueueDType)) {
nodep->v3warn(E_UNSUPPORTED, "Unsupported: Concatenation to form "
<< vdtypep->prettyDTypeNameQ() << "data type");
<< vdtypep->prettyDTypeNameQ() << " data type");
}
iterateCheckSizedSelf(nodep, "LHS", nodep->lhsp(), SELF, BOTH);

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@ -1,4 +1,6 @@
%Error: t/t_mailbox.v:20:4: Can't find typedef: 'mailbox'
20 | mailbox m;
20 | mailbox #(int) m;
| ^~~~~~~
%Error: Exiting due to
%Error: Internal Error: t/t_mailbox.v:20:14: ../V3LinkDot.cpp:#: Pin not under instance?
20 | mailbox #(int) m;
| ^~~

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@ -17,7 +17,7 @@
// endclass
module t(/*AUTOARG*/);
mailbox m;
mailbox #(int) m;
int msg;
int out;

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@ -0,0 +1,6 @@
%Error: t/t_mailbox.v:20:4: Can't find typedef: 'mailbox'
20 | mailbox #(int) m;
| ^~~~~~~
%Error: Internal Error: t/t_mailbox.v:20:14: ../V3LinkDot.cpp:#: Pin not under instance?
20 | mailbox #(int) m;
| ^~~

22
test_regress/t/t_mailbox_bad.pl Executable file
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@ -0,0 +1,22 @@
#!/usr/bin/env perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2022 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
scenarios(vlt => 1);
top_filename("t_mailbox.v");
lint(
verilator_flags2 => ["--xml-only"],
fails => 1,
expect_filename => $Self->{golden_filename},
);
ok(1);
1;

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@ -0,0 +1,17 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2022 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
module t(/*AUTOARG*/);
mailbox #(int) m;
initial begin
m = new(4);
if (m.bad_method() != 0) $stop;
$write("*-* All Finished *-*\n");
$finish;
end
endmodule

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@ -6,16 +6,16 @@
// Methods defined by IEEE:
// class process;
// enum state { FINISHED, RUNNING, WAITING, SUSPENDED, KILLED };
// enum state { FINISHED, RUNNING, WAITING, SUSPENDED, KILLED }; // UVM uses KILLED, FINISHED
// static function process self();
// function state status();
// function void kill();
// task await(); // Warn as unsupported (no UVM library use)
// function void suspend(); // Warn as unsupported (no UVM library use)
// function void resume(); // Warn as unsupported (no UVM library use)
// function void srandom( int seed ); // Just ignore?
// function string get_randstate(); // Just ignore?
// function void set_randstate( string state ); // Just ignore?
// function void srandom( int seed ); // Operate on all proceses for now?
// function string get_randstate(); // Operate on all proceses for now?
// function void set_randstate( string state ); // Operate on all proceses for now?
// endclass
module t(/*AUTOARG*/);

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@ -0,0 +1,10 @@
%Error: t/t_process.v:22:4: Can't find typedef: 'process'
22 | process p;
| ^~~~~~~
%Error-UNSUPPORTED: t/t_process.v:26:20: Unsupported: 'process'
26 | p = process::self();
| ^~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Internal Error: t/t_process.v:26:11: ../V3LinkDot.cpp:#: Bad package link
26 | p = process::self();
| ^~~~~~~

22
test_regress/t/t_process_bad.pl Executable file
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@ -0,0 +1,22 @@
#!/usr/bin/env perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2022 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
scenarios(vlt => 1);
top_filename("t_process.v");
lint(
verilator_flags2 => ["--xml-only"],
fails => 1,
expect_filename => $Self->{golden_filename},
);
ok(1);
1;

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@ -0,0 +1,20 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2022 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
module t(/*AUTOARG*/);
process p;
initial begin
if (p != null) $stop;
p = process::self();
if (p.bad_method() != 0) $stop;
p.bad_method_2();
$write("*-* All Finished *-*\n");
$finish;
end
endmodule

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@ -1,4 +1,7 @@
%Error: t/t_semaphore.v:17:4: Can't find typedef: 'semaphore'
17 | semaphore s;
| ^~~~~~~~~
%Error: t/t_semaphore.v:18:4: Can't find typedef: 'semaphore'
18 | semaphore s2;
| ^~~~~~~~~
%Error: Exiting due to

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@ -13,8 +13,9 @@
// endclass
module t(/*AUTOARG*/);
//From UVM:
// From UVM:
semaphore s;
semaphore s2;
int msg;
initial begin
@ -30,6 +31,7 @@ module t(/*AUTOARG*/);
s.put(2);
if (s.try_get(2) <= 0) $stop;
`ifndef VERILATOR
fork
begin
#10; // So later then get() starts below
@ -42,6 +44,10 @@ module t(/*AUTOARG*/);
s.get();
end
join
`endif
s2 = new;
if (s2.try_get() != 0) $stop;
$write("*-* All Finished *-*\n");
$finish;

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@ -0,0 +1,7 @@
%Error: t/t_semaphore.v:17:4: Can't find typedef: 'semaphore'
17 | semaphore s;
| ^~~~~~~~~
%Error: t/t_semaphore.v:18:4: Can't find typedef: 'semaphore'
18 | semaphore s2;
| ^~~~~~~~~
%Error: Exiting due to

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@ -0,0 +1,22 @@
#!/usr/bin/env perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2022 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
scenarios(vlt => 1);
top_filename("t_semaphore.v");
lint(
verilator_flags2 => ["--xml-only"],
fails => 1,
expect_filename => $Self->{golden_filename},
);
ok(1);
1;

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@ -0,0 +1,17 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2022 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
module t(/*AUTOARG*/);
semaphore s;
initial begin
s = new(4);
if (s.bad_method() != 0) $stop;
$write("*-* All Finished *-*\n");
$finish;
end
endmodule