Fix missing net type mappings in FST traces (#6582) (#6583)

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Matt Stroud 2025-10-22 01:07:51 +00:00 committed by GitHub
parent cc77233902
commit 6f055f84ce
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6 changed files with 401 additions and 373 deletions

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@ -162,6 +162,7 @@ Marshal Qiao
Martin Schmidt
Martin Stadler
Mateusz Gancarz
Matt Stroud
Matthew Ballance
Max Wipfli
Michael Bedford Taylor

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@ -230,6 +230,9 @@ void VerilatedFst::declare(uint32_t code, const char* name, int dtypenum,
else if (kind == VerilatedTraceSigKind::TRI) varType = FST_VT_VCD_TRI;
else if (kind == VerilatedTraceSigKind::TRI0) varType = FST_VT_VCD_TRI0;
else if (kind == VerilatedTraceSigKind::TRI1) varType = FST_VT_VCD_TRI1;
else if (kind == VerilatedTraceSigKind::TRIAND) varType = FST_VT_VCD_TRIAND;
else if (kind == VerilatedTraceSigKind::TRIOR) varType = FST_VT_VCD_TRIOR;
else if (kind == VerilatedTraceSigKind::TRIREG) varType = FST_VT_VCD_TRIREG;
else if (kind == VerilatedTraceSigKind::WIRE) varType = FST_VT_VCD_WIRE;
//
else if (type == VerilatedTraceSigType::INTEGER) varType = FST_VT_VCD_INTEGER;

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@ -77,6 +77,9 @@ enum class VerilatedTraceSigKind : uint8_t {
TRI,
TRI0,
TRI1,
TRIAND,
TRIOR,
TRIREG,
WIRE,
VAR,
};

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@ -38,7 +38,13 @@ module t (/*AUTOARG*/
tri0 fst_tri0;
tri1 fst_tri1;
tri fst_tri;
triand fst_triand;
trior fst_trior;
//trireg fst_trireg; // Error-UNSUPPORTED
wand fst_wand;
wor fst_wor;
wire fst_wire;
uwire fst_uwire;
inout fst_inout;
Test test (/*AUTOINST*/

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@ -536,7 +536,12 @@
(fst_tri0 (T0 1000) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
(fst_tri1 (T0 0) (T1 1000) (TZ 0) (TX 0) (TB 0) (TC 1))
(fst_tri (T0 1000) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
(fst_triand (T0 1000) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
(fst_trior (T0 1000) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
(fst_wand (T0 1000) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
(fst_wor (T0 1000) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
(fst_wire (T0 1000) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
(fst_uwire (T0 1000) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
(fst_inout (T0 1000) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
)
(INSTANCE test