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Support power operator with real, bug809.
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+10
-3
@@ -690,15 +690,21 @@ private:
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// Pow is special, output sign only depends on LHS sign, but function result depends on both signs
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// RHS is self-determined (IEEE)
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// Real if either side is real (as with AstAdd)
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iterate_shift_prelim(nodep, vup); // Iterate rhsp() as self-determined
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if (vup->c()->prelim()) {
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nodep->lhsp()->iterateAndNext(*this,WidthVP(CONTEXT,PRELIM).p());
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nodep->rhsp()->iterateAndNext(*this,WidthVP(CONTEXT,PRELIM).p());
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if (nodep->lhsp()->isDouble() || nodep->rhsp()->isDouble()) {
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spliceCvtD(nodep->lhsp());
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spliceCvtD(nodep->rhsp());
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replaceWithDVersion(nodep); nodep=NULL;
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return;
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}
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checkCvtUS(nodep->lhsp());
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iterateCheckSizedSelf(nodep,"RHS",nodep->rhsp(),SELF,BOTH);
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nodep->dtypeFrom(nodep->lhsp());
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}
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if (vup->c()->final()) {
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AstNodeDType* expDTypep = vup->c()->dtypeOverridep(nodep->dtypep());
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nodep->dtypeFrom(expDTypep);
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@@ -2297,7 +2303,7 @@ private:
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if (newp) {} // Ununused
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}
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void iterate_shift_prelim(AstNodeBiop* nodep, AstNUser* vup) {
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// Shifts, Pow
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// Shifts
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// See IEEE-2012 11.4.10 and Table 11-21.
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// RHS is self-determined. RHS is always treated as unsigned, has no effect on result.
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if (vup->c()->prelim()) {
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@@ -2885,6 +2891,7 @@ private:
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switch (nodep->type()) {
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case AstType::atADD: newp = new AstAddD (fl,lhsp,rhsp); break;
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case AstType::atSUB: newp = new AstSubD (fl,lhsp,rhsp); break;
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case AstType::atPOW: newp = new AstPowD (fl,lhsp,rhsp); break;
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case AstType::atEQ: case AstType::atEQCASE: newp = new AstEqD (fl,lhsp,rhsp); break;
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case AstType::atNEQ: case AstType::atNEQCASE: newp = new AstNeqD (fl,lhsp,rhsp); break;
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case AstType::atGT: case AstType::atGTS: newp = new AstGtD (fl,lhsp,rhsp); break;
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