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https://github.com/verilator/verilator.git
synced 2026-10-06 01:54:01 +02:00
Add new UNSUPPORTED error code to replace most previous Unsupported: messages.
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+7
-9
@@ -228,8 +228,8 @@ private:
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new AstInitial(fl, new AstAssign(fl, new AstVarRef(fl, nodep->name(), true),
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nodep->valuep()->unlinkFrBack())));
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} else if (!m_ftaskp && nodep->isNonOutput()) {
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nodep->v3error(
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"Unsupported: Default value on module input: " << nodep->prettyNameQ());
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nodep->v3warn(E_UNSUPPORTED, "Unsupported: Default value on module input: "
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<< nodep->prettyNameQ());
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nodep->valuep()->unlinkFrBack()->deleteTree();
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} // 3. Under modules, it's an initial value to be loaded at time 0 via an AstInitial
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else if (m_valueModp) {
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@@ -251,7 +251,7 @@ private:
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// What breaks later is we don't have a Scope/Cell representing
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// the interface to attach to
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if (m_modp->level() <= 2) {
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nodep->v3error("Unsupported: Interfaced port on top level module");
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nodep->v3warn(E_UNSUPPORTED, "Unsupported: Interfaced port on top level module");
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}
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}
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}
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@@ -540,12 +540,10 @@ private:
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}
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if (nodep->stmtsp()) alwaysp->addStmtp(nodep->stmtsp()->unlinkFrBackWithNext());
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} else {
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if (!v3Global.opt.bboxUnsup()) {
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nodep->v3error("Unsupported: timing control statement in this location\n"
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<< nodep->warnMore()
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<< "... Suggest have one timing control statement "
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<< "per procedure, at the top of the procedure");
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}
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nodep->v3warn(E_UNSUPPORTED, "Unsupported: timing control statement in this location\n"
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<< nodep->warnMore()
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<< "... Suggest have one timing control statement "
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<< "per procedure, at the top of the procedure");
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}
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VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
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}
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