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https://github.com/verilator/verilator.git
synced 2026-10-08 02:53:12 +02:00
Internal code coverage improvements. No functional change intended.
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+4
-13
@@ -467,8 +467,8 @@ string V3Number::ascii(bool prefixed, bool cleanVerilog) const {
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if (isDouble()) {
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out.precision(17);
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if (width() != 64) {
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out << "%E-bad-width-double";
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if (VL_UNCOVERABLE(width() != 64)) {
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out << "%E-bad-width-double"; // LCOV_EXCL_LINE
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} else {
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out << toDouble();
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}
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@@ -476,8 +476,8 @@ string V3Number::ascii(bool prefixed, bool cleanVerilog) const {
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} else if (isString()) {
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return '"' + toString() + '"';
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} else {
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if ((m_value[words() - 1] | m_valueX[words() - 1]) & ~hiWordMask()) {
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out << "%E-hidden-bits";
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if (VL_UNCOVERABLE((m_value[words() - 1] | m_valueX[words() - 1]) & ~hiWordMask())) {
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out << "%E-hidden-bits"; // LCOV_EXCL_LINE
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}
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}
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if (prefixed) {
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@@ -936,15 +936,6 @@ bool V3Number::isAnyXZ() const {
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}
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return false;
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}
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bool V3Number::isLt(const V3Number& rhs) const {
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for (int bit = 0; bit < std::max(this->width(), rhs.width()); bit++) {
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if (this->bitIs1(bit) && rhs.bitIs0(bit)) { return 1; }
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if (rhs.bitIs1(bit) && this->bitIs0(bit)) { return 0; }
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if (this->bitIsXZ(bit)) { return 0; }
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if (rhs.bitIsXZ(bit)) { return 0; }
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}
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return 0;
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}
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bool V3Number::isLtXZ(const V3Number& rhs) const {
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// Include X/Z in comparisons for sort ordering
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for (int bit = 0; bit < std::max(this->width(), rhs.width()); bit++) {
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