Add experimental --pipe-filter to filter all Verilog input.

This commit is contained in:
Wilson Snyder
2010-01-20 07:15:51 -05:00
parent 28eb5b9bc4
commit 6196cf09ff
25 changed files with 555 additions and 42 deletions
+3 -3
View File
@@ -104,7 +104,7 @@ void V3ParseImp::parseFile(FileLine* fileline, const string& modfilename, bool i
}
// Preprocess into m_ppBuffer
V3PreShell::preproc(fileline, modfilename, this);
V3PreShell::preproc(fileline, modfilename, m_filterp, this);
if (v3Global.opt.preprocOnly() || v3Global.opt.keepTempFiles()) {
// Create output file with all the preprocessor output we buffered up
@@ -151,8 +151,8 @@ void V3ParseImp::lexFile(const string& modname) {
//======================================================================
// V3Parse functions
V3Parse::V3Parse(AstNetlist* rootp) {
m_impp = new V3ParseImp (rootp);
V3Parse::V3Parse(AstNetlist* rootp, V3InFilter* filterp) {
m_impp = new V3ParseImp (rootp, filterp);
}
V3Parse::~V3Parse() {
delete m_impp; m_impp = NULL;