parent
be53eec5ca
commit
5ef373500f
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@ -147,7 +147,7 @@ class EmitCHeader final : public EmitCConstInit {
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if (!VN_IS(modp, Class)) { // Classes use CFuncs with isConstructor/isDestructor
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if (!VN_IS(modp, Class)) { // Classes use CFuncs with isConstructor/isDestructor
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const string& name = prefixNameProtect(modp);
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const string& name = prefixNameProtect(modp);
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putsDecoration("\n// CONSTRUCTORS\n");
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putsDecoration("\n// CONSTRUCTORS\n");
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puts(name + "(" + symClassName() + "* symsp, const char* name);\n");
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puts(name + "(" + symClassName() + "* symsp, const char* v__name);\n");
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puts("~" + name + "();\n");
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puts("~" + name + "();\n");
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puts("VL_UNCOPYABLE(" + name + ");\n");
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puts("VL_UNCOPYABLE(" + name + ");\n");
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}
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}
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@ -250,8 +250,8 @@ class EmitCImp final : EmitCFunc {
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"(" + modName + "* vlSelf);");
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"(" + modName + "* vlSelf);");
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puts("\n");
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puts("\n");
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puts(modName + "::" + modName + "(" + symClassName() + "* symsp, const char* name)\n");
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puts(modName + "::" + modName + "(" + symClassName() + "* symsp, const char* v__name)\n");
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puts(" : VerilatedModule{name}\n");
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puts(" : VerilatedModule{v__name}\n");
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ofp()->indentInc();
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ofp()->indentInc();
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for (const AstNode* nodep = modp->stmtsp(); nodep; nodep = nodep->nextp()) {
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for (const AstNode* nodep = modp->stmtsp(); nodep; nodep = nodep->nextp()) {
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@ -0,0 +1,21 @@
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#!/usr/bin/env perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2003 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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scenarios(simulator => 1);
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compile(
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);
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execute(
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check_finished => 1,
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);
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ok(1);
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1;
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@ -0,0 +1,18 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2022 by Wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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module HasNameParam
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#(parameter name /*verilator public*/ = 0)
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();
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endmodule
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module t ();
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HasNameParam a();
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initial begin
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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