Fix task inlining under case values, bug598. Note this reorders high level operations, so may change loose some optimizations.

Changes

@@ -11,7 +11,7 @@ indicates the contributor was also the author of the fix; Thanks!
 
 ****  Fix non-integer vpi_get_value, bug587.  [Rich Porter]
 
-****  Fix task inlining under $display, bug589.  [Holger Waechtler]
+****  Fix task inlining under $display and case, bug589, bug598.  [Holger Waechtler]
 
 ****  Fix package import of non-localparam parameter, bug591.  [Jeremy Bennett]
 

src/Verilator.cpp

@@ -314,6 +314,11 @@ void process () {
 	v3Global.checkTree();
 	V3Global::dumpGlobalTree("const.tree");
 
+	// Convert case statements to if() blocks.  Must be after V3Unknown
+	// Must be before V3Task so don't need to deal with task in case value compares
+	V3Case::caseAll(v3Global.rootp());
+	V3Global::dumpGlobalTree("case.tree");
+
 	// Inline all tasks
 	V3Task::taskAll(v3Global.rootp());
 	V3Global::dumpGlobalTree("task.tree");
@@ -331,10 +336,6 @@ void process () {
 	V3Slice::sliceAll(v3Global.rootp());
 	V3Global::dumpGlobalTree("slices.tree");
 
-	// Convert case statements to if() blocks.  Must be after V3Unknown
-	V3Case::caseAll(v3Global.rootp());
-	V3Global::dumpGlobalTree("case.tree");
-
 	// Push constants across variables and remove redundant assignments
 	V3Const::constifyAll(v3Global.rootp());
 	V3Global::dumpGlobalTree("const.tree");

test_regress/t/t_func_under2.pl

@@ -0,0 +1,18 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+
+compile (
+    );
+
+execute (
+    check_finished=>1,
+    );
+
+ok(1);
+1;

test_regress/t/t_func_under2.v

@@ -0,0 +1,45 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2012 by Wilson Snyder.
+
+// bug598
+
+module t (/*AUTOARG*/
+   // Outputs
+   val,
+   // Inputs
+   clk
+   );
+
+   input 	   clk;
+   output integer  val;
+   integer 	   dbg_addr = 0;
+
+   function func1;
+      input en;
+      input [31:0] a;
+      func1 = en && (a == 1);
+   endfunction
+
+   function func2;
+      input 	   en;
+      input [31:0] a;
+      func2 = en && (a == 2);
+   endfunction
+
+   always @(posedge clk) begin
+      case( 1'b1 )
+        // This line is OK:
+        func1(1'b1, dbg_addr) : val = 1;
+        // This fails:
+        // %Error: Internal Error: test.v:23: ../V3Task.cpp:993: Function not underneath a statement
+        // %Error: Internal Error: See the manual and http://www.veripool.org/verilator for more assistance.
+        func2(1'b1, dbg_addr) : val = 2;
+        default : val = 0;
+      endcase
+      //
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule