mirror of
https://github.com/verilator/verilator.git
synced 2026-10-06 01:54:01 +02:00
Fix internals to make null-pointer-check clean. Also add more const's. No functional change intended, but likely something will break.
This commit is contained in:
+13
-13
@@ -131,7 +131,7 @@ private:
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AstNodeModule* findModuleSym(const string& modName) {
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VSymEnt* foundp = m_mods.rootp()->findIdFallback(modName);
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if (!foundp) return NULL;
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else return foundp->nodep()->castNodeModule();
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else return VN_CAST(foundp->nodep(), NodeModule);
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}
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AstNodeModule* resolveModule(AstNode* nodep, const string& modName) {
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@@ -203,7 +203,7 @@ private:
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<<"' does not match "<<nodep->typeName()<<" name: "<<nodep->prettyName());
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}
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}
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if (nodep->castIface() || nodep->castPackage()) nodep->inLibrary(true); // Interfaces can't be at top, unless asked
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if (VN_IS(nodep, Iface) || VN_IS(nodep, Package)) nodep->inLibrary(true); // Interfaces can't be at top, unless asked
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bool topMatch = (v3Global.opt.topModule()==nodep->prettyName());
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if (topMatch) {
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m_topVertexp = vertex(nodep);
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@@ -231,11 +231,11 @@ private:
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// but we might support modules-under-modules someday.
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AstNodeModule* modp = resolveModule(nodep, nodep->ifaceName());
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if (modp) {
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if (modp->castIface()) {
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if (VN_IS(modp, Iface)) {
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// Track module depths, so can sort list from parent down to children
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new V3GraphEdge(&m_graph, vertex(m_modp), vertex(modp), 1, false);
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if (!nodep->cellp()) nodep->ifacep(modp->castIface());
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} else if (modp->castNotFoundModule()) { // Will error out later
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if (!nodep->cellp()) nodep->ifacep(VN_CAST(modp, Iface));
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} else if (VN_IS(modp, NotFoundModule)) { // Will error out later
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} else {
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nodep->v3error("Non-interface used as an interface: "<<nodep->prettyName());
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}
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@@ -298,7 +298,7 @@ private:
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// This lets us link the XREFs between the (uncloned) children so
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// they don't point to the same module which would
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// break parameter resolution.
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AstNodeModule* otherModp = cellmodp->user2p()->castNodeModule();
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AstNodeModule* otherModp = VN_CAST(cellmodp->user2p(), NodeModule);
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if (!otherModp) {
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otherModp = cellmodp->cloneTree(false);
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otherModp->name(otherModp->name()+"__Vrcm");
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@@ -342,7 +342,7 @@ private:
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// Convert .* to list of pins
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bool pinStar = false;
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for (AstPin* nextp, *pinp = nodep->pinsp(); pinp; pinp=nextp) {
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nextp = pinp->nextp()->castPin();
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nextp = VN_CAST(pinp->nextp(), Pin);
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if (pinp->dotStar()) {
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if (pinStar) pinp->v3error("Duplicate .* in a cell");
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pinStar = true;
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@@ -351,10 +351,10 @@ private:
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}
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}
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// Convert unnamed pins to pin number based assignments
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for (AstPin* pinp = nodep->pinsp(); pinp; pinp=pinp->nextp()->castPin()) {
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for (AstPin* pinp = nodep->pinsp(); pinp; pinp=VN_CAST(pinp->nextp(), Pin)) {
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if (pinp->name()=="") pinp->name("__pinNumber"+cvtToStr(pinp->pinNum()));
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}
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for (AstPin* pinp = nodep->paramsp(); pinp; pinp=pinp->nextp()->castPin()) {
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for (AstPin* pinp = nodep->paramsp(); pinp; pinp=VN_CAST(pinp->nextp(), Pin)) {
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pinp->param(true);
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if (pinp->name()=="") pinp->name("__paramNumber"+cvtToStr(pinp->pinNum()));
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}
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@@ -362,7 +362,7 @@ private:
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nodep->modName(nodep->modp()->name());
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// Note what pins exist
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vl_unordered_set<string> ports; // Symbol table of all connected port names
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for (AstPin* pinp = nodep->pinsp(); pinp; pinp=pinp->nextp()->castPin()) {
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for (AstPin* pinp = nodep->pinsp(); pinp; pinp=VN_CAST(pinp->nextp(), Pin)) {
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if (pinp->name()=="") pinp->v3error("Connect by position is illegal in .* connected cells");
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if (!pinp->exprp()) {
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if (pinp->name().substr(0, 11) == "__pinNumber") {
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@@ -378,7 +378,7 @@ private:
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// We search ports, rather than in/out declarations as they aren't resolved yet,
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// and it's easier to do it now than in V3LinkDot when we'd need to repeat steps.
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for (AstNode* portnodep = nodep->modp()->stmtsp(); portnodep; portnodep=portnodep->nextp()) {
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if (AstPort* portp = portnodep->castPort()) {
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if (const AstPort* portp = VN_CAST(portnodep, Port)) {
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if (ports.find(portp->name()) == ports.end()
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&& ports.find("__pinNumber"+cvtToStr(portp->pinNum())) == ports.end()) {
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if (pinStar) {
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@@ -398,7 +398,7 @@ private:
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}
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}
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}
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if (nodep->modp()->castIface()) {
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if (VN_IS(nodep->modp(), Iface)) {
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// Cell really is the parent's instantiation of an interface, not a normal module
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// Make sure we have a variable to refer to this cell, so can <ifacename>.<innermember>
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// in the same way that a child does. Rename though to avoid conflict with cell.
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@@ -443,7 +443,7 @@ private:
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void readModNames() {
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// Look at all modules, and store pointers to all module names
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for (AstNodeModule* nextp,* nodep = v3Global.rootp()->modulesp(); nodep; nodep=nextp) {
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nextp = nodep->nextp()->castNodeModule();
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nextp = VN_CAST(nodep->nextp(), NodeModule);
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AstNodeModule* foundp = findModuleSym(nodep->name());
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if (foundp && foundp != nodep) {
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if (!(foundp->fileline()->warnIsOff(V3ErrorCode::MODDUP) || nodep->fileline()->warnIsOff(V3ErrorCode::MODDUP))) {
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