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https://github.com/verilator/verilator.git
synced 2026-09-07 10:01:11 +02:00
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+42
-26
@@ -649,17 +649,25 @@ class ParamProcessor final {
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void visit(AstVarXRef* nodep) override {
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AstVar* const varp = nodep->varp();
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if (!varp) { iterateChildren(nodep); return; }
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if (!varp) {
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iterateChildren(nodep);
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return;
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}
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// Get the dotted prefix (port name) from the VarXRef
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// dotted() format: "portname" or "portname.subpath" or empty
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const string& dotted = nodep->dotted();
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if (dotted.empty()) { iterateChildren(nodep); return; }
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if (dotted.empty()) {
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iterateChildren(nodep);
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return;
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}
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const size_t dotPos = dotted.find('.');
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const string portName
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= (dotPos == string::npos) ? dotted : dotted.substr(0, dotPos);
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if (portName.empty()) { iterateChildren(nodep); return; }
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const string portName = (dotPos == string::npos) ? dotted : dotted.substr(0, dotPos);
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if (portName.empty()) {
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iterateChildren(nodep);
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return;
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}
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// Find the interface port variable in the cloned module
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AstVar* portVarp = nullptr;
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@@ -671,14 +679,23 @@ class ParamProcessor final {
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}
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}
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}
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if (!portVarp) { iterateChildren(nodep); return; }
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if (!portVarp) {
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iterateChildren(nodep);
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return;
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}
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// Get the interface module from the port's dtype
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AstIfaceRefDType* const irefp = VN_CAST(portVarp->subDTypep(), IfaceRefDType);
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if (!irefp) { iterateChildren(nodep); return; }
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if (!irefp) {
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iterateChildren(nodep);
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return;
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}
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AstNodeModule* const newIfacep = irefp->ifaceViaCellp();
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if (!newIfacep) { iterateChildren(nodep); return; }
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if (!newIfacep) {
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iterateChildren(nodep);
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return;
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}
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// Find which module the variable currently belongs to (cached)
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AstNodeModule* const varModp = findVarModule(varp);
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@@ -688,8 +705,8 @@ class ParamProcessor final {
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for (AstNode* stmtp = newIfacep->stmtsp(); stmtp; stmtp = stmtp->nextp()) {
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if (AstVar* const newVarp = VN_CAST(stmtp, Var)) {
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if (newVarp->name() == varp->name()) {
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UINFO(9, "VarXRef relink " << varp->name() << " in "
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<< varModp->name() << " -> " << newIfacep->name() << endl);
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UINFO(9, "VarXRef relink " << varp->name() << " in " << varModp->name()
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<< " -> " << newIfacep->name() << endl);
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nodep->varp(newVarp);
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break;
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}
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@@ -1070,9 +1087,9 @@ class ParamProcessor final {
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}
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AstIfaceRefDType* pinIrefp = nullptr;
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const AstNode* const exprp = pinp->exprp();
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const AstVar* const varp
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= (exprp && VN_IS(exprp, NodeVarRef)) ? VN_AS(exprp, NodeVarRef)->varp()
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: nullptr;
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const AstVar* const varp = (exprp && VN_IS(exprp, NodeVarRef))
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? VN_AS(exprp, NodeVarRef)->varp()
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: nullptr;
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if (varp && varp->subDTypep() && VN_IS(varp->subDTypep(), IfaceRefDType)) {
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pinIrefp = VN_AS(varp->subDTypep(), IfaceRefDType);
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} else if (varp && varp->subDTypep() && arraySubDTypep(varp->subDTypep())
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@@ -1089,10 +1106,10 @@ class ParamProcessor final {
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= VN_AS(arraySubDTypep(VN_AS(exprp->op1p(), VarRef)->varp()->subDTypep()),
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IfaceRefDType);
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} else if (VN_IS(exprp, CellArrayRef)) {
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// Interface array element selection (e.g., l1(l2.l1[0]) for nested iface array)
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// The CellArrayRef is not yet fully linked to an interface type.
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// Skip interface cleanup for this pin - V3LinkDot will resolve this later.
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// Just continue to the next pin without error.
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// Interface array element selection (e.g., l1(l2.l1[0]) for nested iface
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// array) The CellArrayRef is not yet fully linked to an interface type. Skip
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// interface cleanup for this pin - V3LinkDot will resolve this later. Just
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// continue to the next pin without error.
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UINFO(9, "Skipping interface cleanup for CellArrayRef pin: " << pinp << endl);
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continue;
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}
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@@ -1700,9 +1717,8 @@ class ParamVisitor final : public VNVisitor {
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if (cellParamsReferenceIfacePorts(nestedCellp)) continue;
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AstNodeModule* const nestedSrcModp = nestedCellp->modp();
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if (AstNodeModule* const nestedNewModp
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= m_processor.nodeDeparam(nestedCellp, nestedSrcModp, ifaceModp,
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ifaceModp->someInstanceName())) {
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if (AstNodeModule* const nestedNewModp = m_processor.nodeDeparam(
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nestedCellp, nestedSrcModp, ifaceModp, ifaceModp->someInstanceName())) {
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// Recursively process nested interfaces within this nested interface
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if (nestedNewModp != nestedSrcModp) specializeNestedIfaceCells(nestedNewModp);
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}
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@@ -1721,8 +1737,8 @@ class ParamVisitor final : public VNVisitor {
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AstCell* const cellp = VN_CAST(nodep, Cell);
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if (!cellParamsReferenceIfacePorts(cellp)) {
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AstNodeModule* const srcModp = cellp->modp();
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if (AstNodeModule* const newModp
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= m_processor.nodeDeparam(cellp, srcModp, m_modp, m_modp->someInstanceName())) {
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if (AstNodeModule* const newModp = m_processor.nodeDeparam(
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cellp, srcModp, m_modp, m_modp->someInstanceName())) {
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// For specialized interfaces, recursively process nested interface cells.
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// This ensures nested interfaces are already specialized when modules
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// using the interface are processed (parameter passthrough fix).
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@@ -1957,10 +1973,10 @@ class ParamVisitor final : public VNVisitor {
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// For nested interface array ports, the node name may have a __Viftop suffix
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// that doesn't exist in the original unlinked text. Try without the suffix.
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const string viftopSuffix = "__Viftop";
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const string baseName = VString::endsWith(nodep->name(), viftopSuffix)
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? nodep->name().substr(0, nodep->name().size()
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- viftopSuffix.size())
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: nodep->name();
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const string baseName
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= VString::endsWith(nodep->name(), viftopSuffix)
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? nodep->name().substr(0, nodep->name().size() - viftopSuffix.size())
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: nodep->name();
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const string replacestr = baseName + "__BRA__??__KET__";
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const size_t pos = m_unlinkedTxt.find(replacestr);
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// For interface port array element selections (e.g., l1(l2.l1[0])),
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