Internals: Remove code duplication from V3Order
No functional change
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@ -259,41 +259,23 @@ private:
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bool m_newClkMarked; // Flag for deciding whether a new run is needed
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bool m_inAss = false; // Currently inside of a assignment
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int m_childClkWidth = 0; // If in hasClk, width of clock signal in child
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int m_rightClkWidth = 0; // Clk width on the RHS
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// METHODS
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VL_DEBUG_FUNC; // Declare debug()
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virtual void visit(AstNodeAssign* nodep) override {
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m_hasClk = false;
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if (AstVarRef* varrefp = VN_CAST(nodep->rhsp(), VarRef)) {
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this->visit(varrefp);
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m_rightClkWidth = varrefp->width();
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if (varrefp->varp()->attrClocker() == VVarAttrClocker::CLOCKER_YES) {
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if (m_inClocked) {
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varrefp->v3warn(
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CLKDATA, "Clock used as data (on rhs of assignment) in sequential block "
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<< varrefp->prettyNameQ());
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} else {
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m_hasClk = true;
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UINFO(5, "node is already marked as clocker " << varrefp << endl);
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}
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}
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} else {
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m_inAss = true;
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m_childClkWidth = 0;
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iterateAndNextNull(nodep->rhsp());
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m_rightClkWidth = m_childClkWidth;
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m_inAss = false;
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}
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// do the marking
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m_inAss = true;
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m_childClkWidth = 0;
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iterateAndNextNull(nodep->rhsp());
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m_inAss = false;
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if (m_hasClk) {
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if (nodep->lhsp()->width() > m_rightClkWidth) {
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// do the marking
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if (nodep->lhsp()->width() > m_childClkWidth) {
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nodep->v3warn(CLKDATA, "Clock is assigned to part of data signal "
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<< nodep->lhsp()->prettyNameQ());
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UINFO(4, "CLKDATA: lhs with width " << nodep->lhsp()->width() << endl);
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UINFO(4, " but rhs clock with width " << m_rightClkWidth << endl);
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UINFO(4, " but rhs clock with width " << m_childClkWidth << endl);
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return; // skip the marking
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}
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