mirror of
https://github.com/verilator/verilator.git
synced 2026-10-06 01:54:01 +02:00
Internals: UINFO now includes newline itself. No functional change.
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+14
-14
@@ -94,13 +94,13 @@ class InlineMarkVisitor final : public VNVisitor {
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void cantInline(const char* reason, bool hard) {
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if (hard) {
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if (m_modp->user2() != CIL_NOTHARD) {
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UINFO(4, " No inline hard: " << reason << " " << m_modp << endl);
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UINFO(4, " No inline hard: " << reason << " " << m_modp);
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m_modp->user2(CIL_NOTHARD);
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++m_statUnsup;
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}
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} else {
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if (m_modp->user2() == CIL_MAYBE) {
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UINFO(4, " No inline soft: " << reason << " " << m_modp << endl);
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UINFO(4, " No inline soft: " << reason << " " << m_modp);
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m_modp->user2(CIL_NOTSOFT);
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}
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}
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@@ -220,7 +220,7 @@ class InlineMarkVisitor final : public VNVisitor {
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|| refs * statements < v3Global.opt.inlineMult());
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m_moduleState(modp).m_inlined = doit;
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UINFO(4, " Inline=" << doit << " Possible=" << allowed << " Refs=" << refs
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<< " Stmts=" << statements << " " << modp << endl);
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<< " Stmts=" << statements << " " << modp);
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}
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}
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//--------------------
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@@ -261,7 +261,7 @@ class InlineRelinkVisitor final : public VNVisitor {
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m_modp->addInlinesp(nodep);
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// Rename
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nodep->name(m_cellp->name() + "__DOT__" + nodep->name());
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UINFO(6, " Inline " << nodep << endl);
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UINFO(6, " Inline " << nodep);
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// Do CellInlines under this, but don't move them
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iterateChildren(nodep);
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}
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@@ -285,7 +285,7 @@ class InlineRelinkVisitor final : public VNVisitor {
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FileLine* const flp = nodep->fileline();
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AstConst* const exprconstp = VN_CAST(nodep->user2p(), Const);
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AstVarRef* exprvarrefp = VN_CAST(nodep->user2p(), VarRef);
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UINFO(8, "connectto: " << nodep->user2p() << endl);
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UINFO(8, "connectto: " << nodep->user2p());
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UASSERT_OBJ(exprconstp || exprvarrefp, nodep,
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"Unknown interconnect type; pinReconnectSimple should have cleared up");
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if (exprconstp) {
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@@ -296,7 +296,7 @@ class InlineRelinkVisitor final : public VNVisitor {
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// Public variable at the lower module end - we need to make sure we propagate
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// the logic changes up and down; if we aliased, we might
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// remove the change detection on the output variable.
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UINFO(9, "public pin assign: " << exprvarrefp << endl);
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UINFO(9, "public pin assign: " << exprvarrefp);
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UASSERT_OBJ(!nodep->isNonOutput(), nodep, "Outputs only - inputs use AssignAlias");
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m_modp->addStmtsp(new AstAssignW{flp, exprvarrefp->cloneTree(false),
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new AstVarRef{flp, nodep, VAccess::READ}});
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@@ -304,7 +304,7 @@ class InlineRelinkVisitor final : public VNVisitor {
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// Public variable at this end and it is an unpacked array. We need to assign
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// instead of aliased, because otherwise it will pass V3Slice and invalid
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// code will be emitted.
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UINFO(9, "assign to public and unpacked: " << nodep << endl);
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UINFO(9, "assign to public and unpacked: " << nodep);
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exprvarrefp = exprvarrefp->cloneTree(false);
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exprvarrefp->access(VAccess::READ);
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nodep->user4(true); // Making assignment to it
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@@ -387,7 +387,7 @@ class InlineRelinkVisitor final : public VNVisitor {
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if (AstVarRef* const varrefp = VN_CAST(nodep->lhsp(), VarRef)) {
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if (m_initialStatic && varrefp->varp()->user2() && varrefp->varp()->user4()) {
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// Initial assignment to i/o we are overriding, can remove
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UINFO(9, "Remove InitialStatic " << nodep << endl);
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UINFO(9, "Remove InitialStatic " << nodep);
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VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
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return;
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}
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@@ -438,7 +438,7 @@ class InlineRelinkVisitor final : public VNVisitor {
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if (m_renamedInterfaces.count(nodep->dotted())) {
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nodep->dotted(m_cellp->name() + "__DOT__" + nodep->dotted());
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}
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UINFO(8, " " << nodep << endl);
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UINFO(8, " " << nodep);
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iterateChildren(nodep);
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}
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@@ -502,7 +502,7 @@ class InlineVisitor final : public VNVisitor {
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// METHODS
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void inlineCell(AstCell* nodep) {
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UINFO(5, " Inline CELL " << nodep << endl);
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UINFO(5, " Inline CELL " << nodep);
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const VNUser2InUse user2InUse;
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const VNUser3InUse user3InUse;
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@@ -550,7 +550,7 @@ class InlineVisitor final : public VNVisitor {
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// Create assignments to the pins
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for (AstPin* pinp = nodep->pinsp(); pinp; pinp = VN_AS(pinp->nextp(), Pin)) {
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if (!pinp->exprp()) continue;
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UINFO(6, " Pin change from " << pinp->modVarp() << endl);
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UINFO(6, " Pin change from " << pinp->modVarp());
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AstNode* const connectRefp = pinp->exprp();
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UASSERT_OBJ(VN_IS(connectRefp, Const) || VN_IS(connectRefp, VarRef), pinp,
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@@ -572,8 +572,8 @@ class InlineVisitor final : public VNVisitor {
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// One to one interconnect won't make a temporary variable.
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// This prevents creating a lot of extra wires for clock signals.
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// It will become a tracing alias.
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UINFO(6, "One-to-one " << connectRefp << endl);
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UINFO(6, " -to " << pinNewVarp << endl);
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UINFO(6, "One-to-one " << connectRefp);
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UINFO(6, " -to " << pinNewVarp);
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pinNewVarp->user2p(connectRefp);
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// Public output inside the cell must go via an assign rather
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// than alias. Else the public logic will set the alias, losing
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@@ -648,7 +648,7 @@ public:
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// Inline class functions
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void V3Inline::inlineAll(AstNetlist* nodep) {
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UINFO(2, __FUNCTION__ << ": " << endl);
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UINFO(2, __FUNCTION__ << ":");
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{
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const VNUser1InUse m_inuser1; // output of InlineMarkVisitor, input to InlineVisitor.
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