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Fix invalid cast on string structure creation (#4921).

This commit is contained in:
Wilson Snyder 2024-02-25 08:19:53 -05:00
parent 881c6ee655
commit 42041f2403
6 changed files with 824 additions and 757 deletions
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2
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@ -13,6 +13,8 @@ Verilator 5.023 devel
**Minor:**
* Fix invalid cast on string structure creation (#4921). [esynr3z]
Verilator 5.022 2024-02-24
==========================

5
src/V3Cast.cpp
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@ -212,6 +212,11 @@ class CastVisitor final : public VNVisitor {
void visit(AstCMethodCall* nodep) override {
iterateChildren(nodep);
ensureNullChecked(nodep->fromp());
nodep->user1(true);
}
void visit(AstCMethodHard* nodep) override {
iterateChildren(nodep);
nodep->user1(true);
}
void visit(AstMemberSel* nodep) override {
iterateChildren(nodep);

1488
test_regress/t/t_json_only_debugcheck.out
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File diff suppressed because it is too large Load Diff

21
test_regress/t/t_unpacked_str_pair.pl Executable file
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@ -0,0 +1,21 @@
#!/usr/bin/env perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2024 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
scenarios(simulator => 1);
compile(
);
execute(
check_finished => 1,
);
ok(1);
1;

49
test_regress/t/t_unpacked_str_pair.v Normal file
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@ -0,0 +1,49 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2024 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
module t;
typedef string array_of_string_t[];
typedef struct {
string positive;
string negative;
} filter_expression_parts_t;
function automatic array_of_string_t split_by_char(string c, string s);
string parts[$];
int last_char_position = -1;
for (int i = 0; i < s.len(); i++) begin
if (i == s.len()-1)
parts.push_back(s.substr(last_char_position+1, i));
if (string'(s[i]) == c) begin
parts.push_back(s.substr(last_char_position+1, i-1));
last_char_position = i;
end
end
$display("%p", parts);
return parts;
endfunction
function filter_expression_parts_t get_filter_expression_parts(string raw_filter);
string parts[];
parts = split_by_char("-", raw_filter);
return '{ parts[0], parts[1] };
endfunction
initial begin
string raw_filter = "parta-partb";
filter_expression_parts_t parts = get_filter_expression_parts(raw_filter);
$display("%p", parts);
if (parts.positive != "parta") $stop;
if (parts.negative != "partb") $stop;
$write("*-* All Finished *-*\n");
$finish;
end
endmodule

16
test_regress/t/t_xml_debugcheck.out
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@ -637,11 +637,9 @@
<and loc="d,11,8,11,9" dtype_id="9">
<const loc="d,11,8,11,9" name="32&apos;h1" dtype_id="14"/>
<not loc="d,11,8,11,9" dtype_id="9">
<ccast loc="d,11,8,11,9" dtype_id="9">
<cmethodhard loc="d,11,8,11,9" name="any" dtype_id="9">
<varref loc="d,11,8,11,9" name="__VactTriggered" dtype_id="9"/>
</cmethodhard>
</ccast>
<cmethodhard loc="d,11,8,11,9" name="any" dtype_id="9">
<varref loc="d,11,8,11,9" name="__VactTriggered" dtype_id="9"/>
</cmethodhard>
</not>
</and>
<begin>
@ -666,11 +664,9 @@
<and loc="d,11,8,11,9" dtype_id="9">
<const loc="d,11,8,11,9" name="32&apos;h1" dtype_id="14"/>
<not loc="d,11,8,11,9" dtype_id="9">
<ccast loc="d,11,8,11,9" dtype_id="9">
<cmethodhard loc="d,11,8,11,9" name="any" dtype_id="9">
<varref loc="d,11,8,11,9" name="__VnbaTriggered" dtype_id="9"/>
</cmethodhard>
</ccast>
<cmethodhard loc="d,11,8,11,9" name="any" dtype_id="9">
<varref loc="d,11,8,11,9" name="__VnbaTriggered" dtype_id="9"/>
</cmethodhard>
</not>
</and>
<begin>